[clang] cc7bf9b - [X86] Allow 32-bit mode only CPUs with -mtune on 64-bit targets

Craig Topper via cfe-commits cfe-commits at lists.llvm.org
Sat Aug 22 16:38:24 PDT 2020


Author: Craig Topper
Date: 2020-08-22T16:38:05-07:00
New Revision: cc7bf9bcbfbc8d8188d9fe540c2bc1aee23824af

URL: https://github.com/llvm/llvm-project/commit/cc7bf9bcbfbc8d8188d9fe540c2bc1aee23824af
DIFF: https://github.com/llvm/llvm-project/commit/cc7bf9bcbfbc8d8188d9fe540c2bc1aee23824af.diff

LOG: [X86] Allow 32-bit mode only CPUs with -mtune on 64-bit targets

gcc errors on this, but I'm nervous that since -mtune has been
ignored by clang for so long that there may be code bases out
there that pass 32-bit cpus to clang.

Added: 
    

Modified: 
    clang/include/clang/Basic/TargetInfo.h
    clang/lib/Basic/Targets.cpp
    clang/lib/Basic/Targets/X86.cpp
    clang/lib/Basic/Targets/X86.h
    clang/test/Driver/x86-mtune.c
    clang/test/Misc/target-invalid-cpu-note.c
    llvm/include/llvm/Support/X86TargetParser.h

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 9c65ca18632a..7253b5ea9abe 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -1143,11 +1143,22 @@ class TargetInfo : public virtual TransferrableTargetInfo,
   /// Fill a SmallVectorImpl with the valid values to setCPU.
   virtual void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {}
 
+  /// Fill a SmallVectorImpl with the valid values for tuning CPU.
+  virtual void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const {
+    fillValidCPUList(Values);
+  }
+
   /// brief Determine whether this TargetInfo supports the given CPU name.
   virtual bool isValidCPUName(StringRef Name) const {
     return true;
   }
 
+  /// brief Determine whether this TargetInfo supports the given CPU name for
+  // tuning.
+  virtual bool isValidTuneCPUName(StringRef Name) const {
+    return isValidCPUName(Name);
+  }
+
   /// brief Determine whether this TargetInfo supports tune in target attribute.
   virtual bool supportsTargetAttributeTune() const {
     return false;

diff  --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 50a3b0e83a56..38a388afa534 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -655,10 +655,11 @@ TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
   }
 
   // Check the TuneCPU name if specified.
-  if (!Opts->TuneCPU.empty() && !Target->isValidCPUName(Opts->TuneCPU)) {
+  if (!Opts->TuneCPU.empty() &&
+      !Target->isValidTuneCPUName(Opts->TuneCPU)) {
     Diags.Report(diag::err_target_unknown_cpu) << Opts->TuneCPU;
     SmallVector<StringRef, 32> ValidList;
-    Target->fillValidCPUList(ValidList);
+    Target->fillValidTuneCPUList(ValidList);
     if (!ValidList.empty())
       Diags.Report(diag::note_valid_options) << llvm::join(ValidList, ", ");
     return nullptr;

diff  --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 8b8f7d43b277..64c7ce9182c9 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -1436,6 +1436,10 @@ void X86TargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
   llvm::X86::fillValidCPUArchList(Values, Only64Bit);
 }
 
+void X86TargetInfo::fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const {
+  llvm::X86::fillValidCPUArchList(Values);
+}
+
 ArrayRef<const char *> X86TargetInfo::getGCCRegNames() const {
   return llvm::makeArrayRef(GCCRegNames);
 }

diff  --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index 754aae3ebbf3..853c4e621222 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -305,7 +305,15 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
     return llvm::X86::parseArchX86(Name, Only64Bit) != llvm::X86::CK_None;
   }
 
+  bool isValidTuneCPUName(StringRef Name) const override {
+    // Allow 32-bit only CPUs regardless of 64-bit mode unlike isValidCPUName.
+    // NOTE: gcc rejects 32-bit mtune CPUs in 64-bit mode. But being lenient
+    // since mtune was ignored by clang for so long.
+    return llvm::X86::parseArchX86(Name) != llvm::X86::CK_None;
+  }
+
   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
+  void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
 
   bool setCPU(const std::string &Name) override {
     bool Only64Bit = getTriple().getArch() != llvm::Triple::x86;

diff  --git a/clang/test/Driver/x86-mtune.c b/clang/test/Driver/x86-mtune.c
index 65ac1a510eec..731c580afc48 100644
--- a/clang/test/Driver/x86-mtune.c
+++ b/clang/test/Driver/x86-mtune.c
@@ -3,3 +3,18 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -mtune=nocona 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=nocona
 // nocona: "-tune-cpu" "nocona"
+
+// Unlike march we allow 32-bit only cpus with mtune.
+
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -mtune=i686 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=i686
+// i686: "-tune-cpu" "i686"
+
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -mtune=pentium4 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=pentium4
+// pentium4: "-tune-cpu" "pentium4"
+
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -mtune=athlon 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=athlon
+// athlon: "-tune-cpu" "athlon"
+

diff  --git a/clang/test/Misc/target-invalid-cpu-note.c b/clang/test/Misc/target-invalid-cpu-note.c
index 2cad62e2e245..803b784bc0ec 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -53,13 +53,17 @@
 
 // RUN: not %clang_cc1 -triple x86_64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_X86_64
 // TUNE_X86_64: error: unknown target CPU 'not-a-cpu'
-// TUNE_X86_64: note: valid target CPU values are: nocona, core2, penryn, bonnell,
-// TUNE_X86_64-SAME: atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere,
-// TUNE_X86_64-SAME: sandybridge, corei7-avx, ivybridge, core-avx-i, haswell,
-// TUNE_X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake,
-// TUNE_X86_64-SAME: icelake-client, icelake-server, tigerlake, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
-// TUNE_X86_64-SAME: athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1,
-// TUNE_X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64
+// TUNE_X86_64: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3,
+// TUNE_X86_64-SAME: i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3,
+// TUNE_X86_64-SAME: pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott,
+// TUNE_X86_64-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
+// TUNE_X86_64-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
+// TUNE_X86_64-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
+// TUNE_X86_64-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, icelake-server, tigerlake, knl, knm, lakemont, k6, k6-2, k6-3,
+// TUNE_X86_64-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
+// TUNE_X86_64-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
+// TUNE_X86_64-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2,
+// TUNE_X86_64-SAME: x86-64, geode
 
 // RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX
 // NVPTX: error: unknown target CPU 'not-a-cpu'

diff  --git a/llvm/include/llvm/Support/X86TargetParser.h b/llvm/include/llvm/Support/X86TargetParser.h
index a26ac8dac3ba..36d8f41df6ec 100644
--- a/llvm/include/llvm/Support/X86TargetParser.h
+++ b/llvm/include/llvm/Support/X86TargetParser.h
@@ -130,7 +130,7 @@ CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false);
 /// Provide a list of valid CPU names. If \p Only64Bit is true, the list will
 /// only contain 64-bit capable CPUs.
 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values,
-                          bool ArchIs32Bit);
+                          bool Only64Bit = false);
 
 /// Get the key feature prioritizing target multiversioning.
 ProcessorFeatures getKeyFeature(CPUKind Kind);


        


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