[PATCH] D83338: [PowerPC][Power10] Implemented Vector Shift Builtins

Thu Aug 6 22:41:23 PDT 2020

amyk added inline comments.

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Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:1144
+            (v1i128 (VSLQ v1i128:$VRA, v1i128:$VRB))>;
+  def : Pat<(v1i128 (PPCshl v1i128:$VRA, v1i128:$VRB)),
+            (v1i128 (VSLQ v1i128:$VRA, v1i128:$VRB))>;
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amyk wrote:
> I noticed that we have patterns for the PPCISD nodes, but I think no tests to show these patterns?
My apologies, upon closer inspection I noticed that your tests are in fact the ones with the PPCISD nodes but you are missing the regular shl/srl/sra. Please add the tests for these, as well. 

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83338/new/

https://reviews.llvm.org/D83338