[PATCH] D84968: [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

[Baptiste Saleil via Phabricator via cfe-commits]

bsaleil created this revision.
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bsaleil added projects: PowerPC, LLVM.
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This patch legalizes the `v256i1` and `v512i1` types that will be used for MMA.

It implements loads and stores of these types.
`v256i1` is a pair of VSX registers, so for this type, we load/store the two underlying registers.
`v512i1` is used for MMA accumulators. So in addition to loading and storing the 4 associated VSX registers, we generate instructions to prime (copy the VSX registers to the accumulator) after loading and unprime (copy the accumulator back to the VSX registers) before storing.

We also add the UACC register class. This class represents accumulator in their unprimed form. This class is necessary to allow the distinction between primed and unprimed accumulators to avoid invalid copies of the VSX registers associated with primed accumulators.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84968

Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/target-data.c
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/lib/Target/PowerPC/PPCRegisterInfo.td
  llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
  llvm/test/CodeGen/PowerPC/mma-acc-memops.ll

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