[PATCH] D84414: [RISCV] Support Shadow Call Stack

[Z. Zheng via Phabricator via cfe-commits]

zzheng updated this revision to Diff 281038.
zzheng marked 7 inline comments as done.
zzheng edited the summary of this revision.
zzheng added a comment.

Addressed styling & code clarity issues.

Fixed wrong opcode for RV64.

Unlike x18 on AArch64,  there's no register that should normally be reserved/not-used on RISCV. So using any eligible register would break ABI compatibility. x18 is neither a better nor a worse choice than other registers. Non-SCS code should be built with -ffixed-x18 to be compatible with SCS-enabled code.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84414/new/

https://reviews.llvm.org/D84414

Files:
  clang/lib/Driver/SanitizerArgs.cpp
  clang/lib/Driver/ToolChain.cpp
  clang/test/CodeGen/shadowcallstack-attr.c
  clang/test/Driver/sanitizer-ld.c
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
  llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
  llvm/test/CodeGen/RISCV/shadowcallstack.ll

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