[PATCH] D83516: [PowerPC][Power10] Vector shift Instruction definitions and MC Tests

[Albion Fung via Phabricator via cfe-commits]

Conanap updated this revision to Diff 277127.
Conanap added a comment.

Added a new line to the end of ppc64-encoding-ISA31.txt


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83516/new/

https://reviews.llvm.org/D83516

Files:
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
  llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s

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