[PATCH] D83338: [PowerPC][Power10] Implemented Vector Shift Builtins

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Conanap created this revision.
Conanap added reviewers: PowerPC, power-llvm-team, saghir, nemanjai, hfinkel.
Conanap added projects: LLVM, clang, PowerPC.

Implemented the following vector right and left shift builtins and its test cases:

  vector unsigned __int128 vec_sl(vector unsigned __int128 a, vector unsigned __int128 b)
  vector signed __int128 vec_sl(vector signed __int128 a, vector unsigned __int128 b)
  vector unsigned __int128 vec_sr(vector unsigned __int128 a, vector unsigned __int128 b)
  vector signed __int128 vec_sr(vector signed __int128 a, vector unsigned __int128 b)
  vector unsigned __int128 vec_sra(vector unsigned __int128 a, vector unsigned __int128 b)
  vector signed __int128 vec_sra(vector signed __int128 a, vector unsigned __int128 b)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83338

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Headers/altivec.h
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
  llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s

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