[PATCH] D82345: [sve][acle] Implement some of the C intrinsics for brain float.

Cullen Rhodes via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jun 25 05:15:06 PDT 2020


c-rhodes added a comment.

We need to guard the LLVM patterns on the +bf16 feature as we've done in other patches



================
Comment at: clang/include/clang/Basic/arm_sve.td:694
 def SVDUPQ_16 : SInst<"svdupq[_n]_{d}", "dssssssss",  "sUsh", MergeNone>;
+let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16) && defined(__ARM_FEATURE_BF16_SCALAR_ARITHMETIC) " in {
+  def SVDUPQ_BF16 : SInst<"svdupq[_n]_{d}", "dssssssss",  "b", MergeNone>;
----------------
`__ARM_FEATURE_SVE_BF16` will imply `__ARM_FEATURE_BF16_SCALAR_ARITHMETIC` so guarding only on the former should be sufficient. Same applies below


================
Comment at: clang/include/clang/Basic/arm_sve.td:830
 
+def SVINSR   : SInst<"svinsr[_n_{d}]", "dds",  "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_insr">;
+let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16) && defined(__ARM_FEATURE_BF16_SCALAR_ARITHMETIC) " in {
----------------
nit: remove double spaces


================
Comment at: clang/lib/CodeGen/CGBuiltin.cpp:7745-7746
+
+  case SVETypeFlags::EltTyBFloat16:
+    return llvm::ScalableVectorType::get(Builder.getInt1Ty(), 8);
   }
----------------
already added in D82399, you should see it when rebasing


================
Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll:317-318
+  %out = call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16(<vscale x 8 x i1> %pg,
+                                                        bfloat %a,
+                                                        <vscale x 8 x bfloat> %b)
+  ret bfloat %out
----------------
nit: alignment


================
Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll:665
+  %res = call bfloat @llvm.aarch64.sve.lasta.nxv8bf16(<vscale x 8 x i1> %pg,
+                                                   <vscale x 8 x bfloat> %a)
+  ret bfloat %res
----------------
nit: alignment


================
Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll:65-66
+  %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> %a,
+                                                                <vscale x 8 x i1> %pg,
+                                                                bfloat %b)
+  ret <vscale x 8 x bfloat> %out
----------------
nit: alignment


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82345/new/

https://reviews.llvm.org/D82345





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