[PATCH] D78129: Add Marvell ThunderX3T110 support

[Wei Zhao via Phabricator via cfe-commits]

wxz2020 marked 2 inline comments as done.
wxz2020 added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:849-857
+// These pointer authentication instructions require armv8.3a
+let Predicates = [HasV8_3a, HasPA] in {
 let Uses = [LR], Defs = [LR] in {
   def PACIAZ   : SystemNoOperands<0b000, "hint\t#24">;
   def PACIBZ   : SystemNoOperands<0b010, "hint\t#26">;
   let isAuthenticated = 1 in {
     def AUTIAZ   : SystemNoOperands<0b100, "hint\t#28">;
----------------
ktkachov wrote:
> IIRC these instructions are deliberately allowed in pre-armv8.3 targets because they are encoded in the NOP-space and can be deployed on pre-armv8.3 targets 
I will do some research on this.


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Comment at: llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td:9
+//
+// This file defines the scheduling model for Marvell ThunderX3T101
+// family of processors.
----------------
ktkachov wrote:
> Typo in the processor name?
Sure, thanks for spotting it. I will have it fixed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78129/new/

https://reviews.llvm.org/D78129