[PATCH] D78563: [AIX] Port power alignment rules to clang

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 259559.
Xiangling_L marked 5 inline comments as done.
Xiangling_L added a comment.

Adjust some comments style;
Add more testcases;


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78563/new/

https://reviews.llvm.org/D78563

Files:
  clang/include/clang/AST/RecordLayout.h
  clang/lib/AST/RecordLayout.cpp
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-virtual-function-alignment.cpp

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