[PATCH] D78131: [SVE] Fix unsigned is always >= 0

[Christopher Tetreault via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG464a0697e36a: [SVE] Fix unsigned is always >= 0 (authored by ctetreau).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D78131/new/

https://reviews.llvm.org/D78131

Files:
  clang/utils/TableGen/SveEmitter.cpp


Index: clang/utils/TableGen/SveEmitter.cpp
===================================================================
--- clang/utils/TableGen/SveEmitter.cpp
+++ clang/utils/TableGen/SveEmitter.cpp
@@ -801,9 +801,10 @@
     // Collate a list of range/option checks for the immediates.
     SmallVector<ImmCheck, 2> ImmChecks;
     for (auto *R : ImmCheckList) {
-      unsigned Arg = R->getValueAsInt("Arg");
-      unsigned EltSizeArg = R->getValueAsInt("EltSizeArg");
-      unsigned Kind = R->getValueAsDef("Kind")->getValueAsInt("Value");
+      int64_t Arg = R->getValueAsInt("Arg");
+      int64_t EltSizeArg = R->getValueAsInt("EltSizeArg");
+      int64_t Kind = R->getValueAsDef("Kind")->getValueAsInt("Value");
+      assert(Arg >= 0 && Kind >= 0 && "Arg and Kind must be nonnegative");
 
       unsigned ElementSizeInBits = 0;
       if (EltSizeArg >= 0)


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