[PATCH] D77872: [AArch32] Armv8.6-a Matrix Mult Assembly + Intrinsics

[Mikhail Maltsev via Phabricator via cfe-commits]

miyuki added inline comments.


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Comment at: clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:3
+// RUN: -fallow-half-arguments-and-returns -S -disable-O0-optnone -emit-llvm -o - %s \
+// RUN: | opt -S -mem2reg \
+// RUN: | FileCheck %s
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Can you try -sroa after -mem2reg? I think it should eliminate some more useless stores and loads.


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Comment at: llvm/lib/Target/ARM/ARMInstrNEON.td:4839
   let Constraints = "$dst = $Vd";
+  let hasNoSchedulingInfo = 1;
 }
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Why was this added?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77872/new/

https://reviews.llvm.org/D77872