[PATCH] D68362: [libunwind][RISCV] Add 64-bit RISC-V support

[Mitchell Horne via Phabricator via cfe-commits]

mhorne created this revision.
Herald added subscribers: s.egerton, lenary, benna, psnobl, PkmX, rkruppe, rogfer01, shiva0217, christof, kito-cheng, simoncook, krytarowski, aprantl.

Add unwinding support for 64-bit RISC-V.

This is from the FreeBSD implementation with the following minor
changes:

- Renamed and renumbered DWARF registers to match the RISC-V ABI [1]
- Use the ABI mneumonics in getRegisterName() instead of the exact register names
- Include checks for __riscv_xlen == 64 to facilitate adding the 32-bit ABI in the future.

[1] https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md


https://reviews.llvm.org/D68362

Files:
  libunwind/include/__libunwind_config.h
  libunwind/include/libunwind.h
  libunwind/src/Registers.hpp
  libunwind/src/UnwindCursor.hpp
  libunwind/src/UnwindRegistersRestore.S
  libunwind/src/UnwindRegistersSave.S
  libunwind/src/config.h
  libunwind/src/libunwind.cpp

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