[PATCH] D67399: [ARM] Follow AACPS standard for volatile bitfields

[Diogo N. Sampaio via Phabricator via cfe-commits]

dnsampaio added a comment.

This patch could hack clang to generate an extra load. However, my knowledge in the clang code base is not extensive. How could we ensure that the width of loads and stores are the size of the container, and  that they don't overlap non-bitfields?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D67399/new/

https://reviews.llvm.org/D67399