[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

[David Greene via Phabricator via cfe-commits]

greened added inline comments.


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Comment at: docs/LangRef.rst:3818
+- ``Upl``: One of the low eight SVE predicate registers (P0 to P7)
+- ``Upa``: Any of the SVE predicate registers (P0 to P15)
 
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What do these names mean?  "<something> predicate lower|all?"  I see they are the names used in gcc, so I guess it makes sense to use them here.  Are these names used in the SVE architecture manual somewhere?  I cannot find them.


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Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:5747
+
+PredicateConstraint isPredicateConstraint(StringRef Constraint) {
+  PredicateConstraint P = PredicateConstraint::Invalid;
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rovka wrote:
> Nit: I think get- or parsePredicateConstraint reads better, since this doesn't return a simple yes/no answer.
+1.


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  https://reviews.llvm.org/D66524/new/

https://reviews.llvm.org/D66524