r369093 - [RISCV] Add inline asm constraint A for RISC-V

[Hans Wennborg via cfe-commits]

Merged to release_90 in r369649.

On Fri, Aug 16, 2019 at 12:22 PM Lewis Revill via cfe-commits
<cfe-commits at lists.llvm.org> wrote:
>
> Author: lewis-revill
> Date: Fri Aug 16 03:23:56 2019
> New Revision: 369093
>
> URL: http://llvm.org/viewvc/llvm-project?rev=369093&view=rev
> Log:
> [RISCV] Add inline asm constraint A for RISC-V
>
> This allows the constraint A to be used in inline asm for RISC-V, which
> allows an address held in a register to be used.
>
> This patch adds the minimal amount of code required to get operands with
> the right constraints to compile.
>
> Differential Revision: https://reviews.llvm.org/D54295
>
>
> Modified:
>     cfe/trunk/lib/Basic/Targets/RISCV.cpp
>     cfe/trunk/test/CodeGen/riscv-inline-asm.c
>
> Modified: cfe/trunk/lib/Basic/Targets/RISCV.cpp
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/RISCV.cpp?rev=369093&r1=369092&r2=369093&view=diff
> ==============================================================================
> --- cfe/trunk/lib/Basic/Targets/RISCV.cpp (original)
> +++ cfe/trunk/lib/Basic/Targets/RISCV.cpp Fri Aug 16 03:23:56 2019
> @@ -75,6 +75,10 @@ bool RISCVTargetInfo::validateAsmConstra
>      // A floating-point register.
>      Info.setAllowsRegister();
>      return true;
> +  case 'A':
> +    // An address that is held in a general-purpose register.
> +    Info.setAllowsMemory();
> +    return true;
>    }
>  }
>
>
> Modified: cfe/trunk/test/CodeGen/riscv-inline-asm.c
> URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/riscv-inline-asm.c?rev=369093&r1=369092&r2=369093&view=diff
> ==============================================================================
> --- cfe/trunk/test/CodeGen/riscv-inline-asm.c (original)
> +++ cfe/trunk/test/CodeGen/riscv-inline-asm.c Fri Aug 16 03:23:56 2019
> @@ -38,3 +38,9 @@ void test_f() {
>  // CHECK: call void asm sideeffect "", "f"(double [[FLT_ARG]])
>    asm volatile ("" :: "f"(d));
>  }
> +
> +void test_A(int *p) {
> +// CHECK-LABEL: define void @test_A(i32* %p)
> +// CHECK: call void asm sideeffect "", "*A"(i32* %p)
> +  asm volatile("" :: "A"(*p));
> +}
>
>
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