r366480 - [RISCV] Hard float ABI support
Hans Wennborg via cfe-commits
cfe-commits at lists.llvm.org
Fri Jul 19 02:42:53 PDT 2019
Merged to the 9.0 branch in r366554.
On Thu, Jul 18, 2019 at 8:29 PM Alex Bradbury via cfe-commits
<cfe-commits at lists.llvm.org> wrote:
> Author: asb
> Date: Thu Jul 18 11:29:59 2019
> New Revision: 366480
> URL: http://llvm.org/viewvc/llvm-project?rev=366480&view=rev
> [RISCV] Hard float ABI support
> The RISC-V hard float calling convention requires the frontend to:
> * Detect cases where, once "flattened", a struct can be passed using
> int+fp or fp+fp registers under the hard float ABI and coerce to the
> appropriate type(s)
> * Track usage of GPRs and FPRs in order to gate the above, and to
> determine when signext/zeroext attributes must be added to integer
> This patch attempts to do this in compliance with the documented ABI,
> and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
> author of that code I've tagged you as reviewer for initial feedback on
> my usage.
> Note that a previous version of the ABI indicated that when passing an
> int+fp struct using a GPR+FPR, the int would need to be sign or
> zero-extended appropriately. GCC never did this and the ABI was changed,
> which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
> handle sign/zero-extension attributes.
> Re-landed after backing out 366450 due to missed hunks.
> Differential Revision: https://reviews.llvm.org/D60456
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