r363056 - [RISCV][NFC] Add missing test files for D54091

Lewis Revill via cfe-commits cfe-commits at lists.llvm.org
Tue Jun 11 05:49:15 PDT 2019


Author: lewis-revill
Date: Tue Jun 11 05:49:15 2019
New Revision: 363056

URL: http://llvm.org/viewvc/llvm-project?rev=363056&view=rev
Log:
[RISCV][NFC] Add missing test files for D54091

Added:
    cfe/trunk/test/CodeGen/riscv-inline-asm.c
    cfe/trunk/test/Sema/inline-asm-validate-riscv.c

Added: cfe/trunk/test/CodeGen/riscv-inline-asm.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/riscv-inline-asm.c?rev=363056&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/riscv-inline-asm.c (added)
+++ cfe/trunk/test/CodeGen/riscv-inline-asm.c Tue Jun 11 05:49:15 2019
@@ -0,0 +1,28 @@
+// RUN: %clang_cc1 -triple riscv32 -O2 -emit-llvm %s -o - \
+// RUN:     | FileCheck %s
+// RUN: %clang_cc1 -triple riscv64 -O2 -emit-llvm %s -o - \
+// RUN:     | FileCheck %s
+
+// Test RISC-V specific inline assembly constraints.
+
+void test_I() {
+// CHECK-LABEL: define void @test_I()
+// CHECK: call void asm sideeffect "", "I"(i32 2047)
+  asm volatile ("" :: "I"(2047));
+// CHECK: call void asm sideeffect "", "I"(i32 -2048)
+  asm volatile ("" :: "I"(-2048));
+}
+
+void test_J() {
+// CHECK-LABEL: define void @test_J()
+// CHECK: call void asm sideeffect "", "J"(i32 0)
+  asm volatile ("" :: "J"(0));
+}
+
+void test_K() {
+// CHECK-LABEL: define void @test_K()
+// CHECK: call void asm sideeffect "", "K"(i32 31)
+  asm volatile ("" :: "K"(31));
+// CHECK: call void asm sideeffect "", "K"(i32 0)
+  asm volatile ("" :: "K"(0));
+}

Added: cfe/trunk/test/Sema/inline-asm-validate-riscv.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/inline-asm-validate-riscv.c?rev=363056&view=auto
==============================================================================
--- cfe/trunk/test/Sema/inline-asm-validate-riscv.c (added)
+++ cfe/trunk/test/Sema/inline-asm-validate-riscv.c Tue Jun 11 05:49:15 2019
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -triple riscv32 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple riscv64 -fsyntax-only -verify %s
+
+void I(int i) {
+  static const int BelowMin = -2049;
+  static const int AboveMax = 2048;
+  asm volatile ("" :: "I"(i)); // expected-error{{constraint 'I' expects an integer constant expression}}
+  asm volatile ("" :: "I"(BelowMin)); // expected-error{{value '-2049' out of range for constraint 'I'}}
+  asm volatile ("" :: "I"(AboveMax)); // expected-error{{value '2048' out of range for constraint 'I'}}
+}
+
+void J(int j) {
+  static const int BelowMin = -1;
+  static const int AboveMax = 1;
+  asm volatile ("" :: "J"(j)); // expected-error{{constraint 'J' expects an integer constant expression}}
+  asm volatile ("" :: "J"(BelowMin)); // expected-error{{value '-1' out of range for constraint 'J'}}
+  asm volatile ("" :: "J"(AboveMax)); // expected-error{{value '1' out of range for constraint 'J'}}
+}
+
+void K(int k) {
+  static const int BelowMin = -1;
+  static const int AboveMax = 32;
+  asm volatile ("" :: "K"(k)); // expected-error{{constraint 'K' expects an integer constant expression}}
+  asm volatile ("" :: "K"(BelowMin)); // expected-error{{value '-1' out of range for constraint 'K'}}
+  asm volatile ("" :: "K"(AboveMax)); // expected-error{{value '32' out of range for constraint 'K'}}
+}




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