[PATCH] D54091: [RISCV] Add inline asm constraints I, J & K for RISC-V

[Alex Bradbury via Phabricator via cfe-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: Jim.

This looks good to me, but is blocked on the dependent patch being updated. I added a minor comment on riscv-inline-asm.c



================
Comment at: test/CodeGen/riscv-inline-asm.c:1
+// RUN: %clang_cc1 -triple riscv32 -target-feature +f -O2 -emit-llvm %s -o - \
+// RUN:     | FileCheck %s
----------------
No need to enable +f for the test, as written.


Repository:
  rC Clang

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  https://reviews.llvm.org/D54091/new/

https://reviews.llvm.org/D54091