[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

Amara Emerson via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Mar 27 09:52:20 PDT 2019

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aemerson added a comment.

Ping. I've filed PR41260 for the code quality issue.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D59615/new/

https://reviews.llvm.org/D59615

Previous message: [PATCH] D59485: [ASTImporter] Add an ImportInternal method to allow customizing Import behavior.
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