r351740 - [AArch64] Use LL for 64-bit intrinsic arguments
Hans Wennborg via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 29 05:48:25 PST 2019
Thanks! I'll merge it after it's been in trunk for a little. Please
let me know if there are any issues or follow-up commits.
Cheers,
Hans
On Tue, Jan 29, 2019 at 4:04 AM Sam Parker <Sam.Parker at arm.com> wrote:
>
> Hi Hans,
>
>
> I've recommitted the change in r352463.
>
>
> cheers,
>
> Sam
>
>
> Sam Parker
>
> Compilation Tools Engineer | Arm
>
> . . . . . . . . . . . . . . . . . . . . . . . . . . .
>
> Arm.com
>
> ________________________________
> From: Hans Wennborg <hans at chromium.org>
> Sent: 25 January 2019 18:26:48
> To: Sam Parker
> Cc: cfe-commits
> Subject: Re: r351740 - [AArch64] Use LL for 64-bit intrinsic arguments
>
> I see this was reverted later, but please keep me posted on the
> resolution as I think we might want to merge this to the 8.0 release
> branch as well.
>
> Thanks,
> Hans
>
> On Mon, Jan 21, 2019 at 3:01 AM Sam Parker via cfe-commits
> <cfe-commits at lists.llvm.org> wrote:
> >
> > Author: sam_parker
> > Date: Mon Jan 21 03:01:05 2019
> > New Revision: 351740
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=351740&view=rev
> > Log:
> > [AArch64] Use LL for 64-bit intrinsic arguments
> >
> > The ACLE states that 64-bit crc32, wsr, rsr and rbit operands are
> > uint64_t so we should have the clang builtin match this description
> > - which is what we already do for AArch32.
> >
> > Differential Revision: https://reviews.llvm.org/D56852
> >
> > Modified:
> > cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
> > cfe/trunk/test/CodeGen/arm64-crc32.c
> > cfe/trunk/test/CodeGen/builtins-arm64.c
> >
> > Modified: cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
> > URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsAArch64.def?rev=351740&r1=351739&r2=351740&view=diff
> > ==============================================================================
> > --- cfe/trunk/include/clang/Basic/BuiltinsAArch64.def (original)
> > +++ cfe/trunk/include/clang/Basic/BuiltinsAArch64.def Mon Jan 21 03:01:05 2019
> > @@ -32,7 +32,7 @@ BUILTIN(__builtin_arm_clrex, "v", "")
> >
> > // Bit manipulation
> > BUILTIN(__builtin_arm_rbit, "UiUi", "nc")
> > -BUILTIN(__builtin_arm_rbit64, "LUiLUi", "nc")
> > +BUILTIN(__builtin_arm_rbit64, "LLUiLLUi", "nc")
> >
> > // HINT
> > BUILTIN(__builtin_arm_nop, "v", "")
> > @@ -49,8 +49,8 @@ BUILTIN(__builtin_arm_crc32h, "UiUiUs",
> > BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc")
> > BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc")
> > BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc")
> > -BUILTIN(__builtin_arm_crc32d, "UiUiLUi", "nc")
> > -BUILTIN(__builtin_arm_crc32cd, "UiUiLUi", "nc")
> > +BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc")
> > +BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc")
> >
> > // Memory barrier
> > BUILTIN(__builtin_arm_dmb, "vUi", "nc")
> > @@ -62,10 +62,10 @@ BUILTIN(__builtin_arm_prefetch, "vvC*UiU
> >
> > // System Registers
> > BUILTIN(__builtin_arm_rsr, "UicC*", "nc")
> > -BUILTIN(__builtin_arm_rsr64, "LUicC*", "nc")
> > +BUILTIN(__builtin_arm_rsr64, "LLUicC*", "nc")
> > BUILTIN(__builtin_arm_rsrp, "v*cC*", "nc")
> > BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc")
> > -BUILTIN(__builtin_arm_wsr64, "vcC*LUi", "nc")
> > +BUILTIN(__builtin_arm_wsr64, "vcC*LLUi", "nc")
> > BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc")
> >
> > // MSVC
> >
> > Modified: cfe/trunk/test/CodeGen/arm64-crc32.c
> > URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm64-crc32.c?rev=351740&r1=351739&r2=351740&view=diff
> > ==============================================================================
> > --- cfe/trunk/test/CodeGen/arm64-crc32.c (original)
> > +++ cfe/trunk/test/CodeGen/arm64-crc32.c Mon Jan 21 03:01:05 2019
> > @@ -1,54 +1,57 @@
> > // REQUIRES: aarch64-registered-target
> > // RUN: %clang_cc1 -triple arm64-none-linux-gnu \
> > // RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
> > +// RUN: %clang_cc1 -triple aarch64-windows \
> > +// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
> > +#include <stdint.h>
> >
> > -int crc32b(int a, char b)
> > +uint32_t crc32b(uint32_t a, uint8_t b)
> > {
> > return __builtin_arm_crc32b(a,b);
> > // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
> > // CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])
> > }
> >
> > -int crc32cb(int a, char b)
> > +uint32_t crc32cb(uint32_t a, uint8_t b)
> > {
> > return __builtin_arm_crc32cb(a,b);
> > // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
> > // CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])
> > }
> >
> > -int crc32h(int a, short b)
> > +uint32_t crc32h(uint32_t a, uint16_t b)
> > {
> > return __builtin_arm_crc32h(a,b);
> > // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
> > // CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])
> > }
> >
> > -int crc32ch(int a, short b)
> > +uint32_t crc32ch(uint32_t a, uint16_t b)
> > {
> > return __builtin_arm_crc32ch(a,b);
> > // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
> > // CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])
> > }
> >
> > -int crc32w(int a, int b)
> > +uint32_t crc32w(uint32_t a, uint32_t b)
> > {
> > return __builtin_arm_crc32w(a,b);
> > // CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)
> > }
> >
> > -int crc32cw(int a, int b)
> > +uint32_t crc32cw(uint32_t a, uint32_t b)
> > {
> > return __builtin_arm_crc32cw(a,b);
> > // CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
> > }
> >
> > -int crc32d(int a, long b)
> > +uint32_t crc32d(uint32_t a, uint64_t b)
> > {
> > return __builtin_arm_crc32d(a,b);
> > // CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)
> > }
> >
> > -int crc32cd(int a, long b)
> > +uint32_t crc32cd(uint32_t a, uint64_t b)
> > {
> > return __builtin_arm_crc32cd(a,b);
> > // CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)
> >
> > Modified: cfe/trunk/test/CodeGen/builtins-arm64.c
> > URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm64.c?rev=351740&r1=351739&r2=351740&view=diff
> > ==============================================================================
> > --- cfe/trunk/test/CodeGen/builtins-arm64.c (original)
> > +++ cfe/trunk/test/CodeGen/builtins-arm64.c Mon Jan 21 03:01:05 2019
> > @@ -1,4 +1,6 @@
> > // RUN: %clang_cc1 -triple arm64-unknown-linux -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
> > +// RUN: %clang_cc1 -triple aarch64-windows -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
> > +#include <stdint.h>
> >
> > void f0(void *a, void *b) {
> > __clear_cache(a,b);
> > @@ -55,7 +57,7 @@ unsigned rsr() {
> > return __builtin_arm_rsr("1:2:3:4:5");
> > }
> >
> > -unsigned long rsr64() {
> > +uint64_t rsr64() {
> > // CHECK: call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]])
> > return __builtin_arm_rsr64("1:2:3:4:5");
> > }
> > @@ -72,7 +74,7 @@ void wsr(unsigned v) {
> > __builtin_arm_wsr("1:2:3:4:5", v);
> > }
> >
> > -void wsr64(unsigned long v) {
> > +void wsr64(uint64_t v) {
> > // CHECK: call void @llvm.write_register.i64(metadata ![[M0:[0-9]]], i64 %v)
> > __builtin_arm_wsr64("1:2:3:4:5", v);
> > }
> >
> >
> > _______________________________________________
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> > cfe-commits at lists.llvm.org
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