[PATCH] ARM: add support for QBIT

Renato Golin renato.golin at linaro.org
Tue Nov 4 13:20:12 PST 2014

Comment at: lib/Headers/arm_acle.h:121
@@ +120,3 @@
+__set_saturation_occurred(int occurred) {
+  __asm__ __volatile__ ("msr cpsr_q, %0" : : "r" (occurred));
t.p.northover wrote:
> This also doesn't seem to do what ACLE says: set the Q flag based on the LSB of the input.
> Also, I don't think "cpsr_q" exists, does it? Both the v7A and v7M descriptions I've found lump it in with NZCV (i.e. "cpsr_nzcvq"). Which probably means the assembly should be marked as clobbering CPSR too.
I may be wrong, but I think you need to mrs first to get the bit pattern, change this value based on (occurred != 0) shifted to the right place and writing it back with msr, or you'll end up writing zeroes to the other flags. Or is that only the case with registers?

Comment at: lib/Headers/arm_acle.h:125
@@ +124,3 @@
+static __inline__ void __attribute__((always_inline, nodebug))
+__ignore_saturation(void) {
+  /* not yet implemented */
This will probably need some builtin/intrinsic, since, if I read the ACLE correctly, the context is from *here* to the end of the scope. But it can be left for another set of patches, obviously.


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