[www-scripts] Clang Attribute Doc Update: SUCCESS
LLVM via www-scripts
www-scripts at lists.llvm.org
Wed Jun 26 03:05:54 PDT 2019
UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
D docs/CommandGuide/llvm-cxxfilt.md
U tools/llvm-objcopy/CopyConfig.h
U tools/llvm-objcopy/ELF/ELFObjcopy.cpp
U tools/llvm-objcopy/llvm-objcopy.cpp
U tools/llvm-objcopy/CopyConfig.cpp
U include/llvm/Analysis/LoopInfo.h
U include/llvm/Analysis/TargetTransformInfo.h
U include/llvm/Analysis/LoopInfoImpl.h
U include/llvm/Target/TargetOptions.h
U include/llvm/Support/MemAlloc.h
U include/llvm/BinaryFormat/ELF.h
U include/llvm/BinaryFormat/Wasm.h
U include/llvm/BinaryFormat/Dwarf.def
U include/llvm/MC/MCSymbol.h
U include/llvm/CodeGen/MachineRegisterInfo.h
U include/llvm/CodeGen/CommandFlags.inc
U include/llvm/IR/IntrinsicsAMDGPU.td
U docs/AMDGPUUsage.rst
U docs/AddingConstrainedIntrinsics.rst
U docs/LangRef.rst
U docs/CommandGuide/llvm-readobj.rst
A docs/CommandGuide/llvm-cxxfilt.rst
U utils/TableGen/IntrinsicEmitter.cpp
U utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
U tools/llvm-shlib/CMakeLists.txt
U tools/llvm-objcopy/ELF/Object.h
U tools/llvm-objcopy/ELF/Object.cpp
U tools/llvm-objcopy/StripOpts.td
U tools/llvm-objcopy/ObjcopyOpts.td
U lib/CodeGen/PeepholeOptimizer.cpp
U lib/CodeGen/MachinePipeliner.cpp
U lib/CodeGen/MachineRegisterInfo.cpp
U lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
U lib/CodeGen/HardwareLoops.cpp
U lib/IR/Verifier.cpp
U lib/Analysis/TargetTransformInfo.cpp
U lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
U lib/Target/AMDGPU/SIInstrInfo.td
U lib/Target/AMDGPU/SIISelLowering.cpp
U lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
U lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
U lib/Target/AMDGPU/SIFrameLowering.cpp
U lib/Target/AMDGPU/AMDGPUISelLowering.h
U lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
U lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
U lib/Target/AMDGPU/SIInstructions.td
U lib/Target/AMDGPU/SIFoldOperands.cpp
U lib/Target/AMDGPU/SIShrinkInstructions.cpp
U lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
U lib/Target/AMDGPU/AMDGPUInstructionSelector.h
U lib/Target/AMDGPU/AMDGPURegisterBanks.td
U lib/Target/AMDGPU/SIMachineFunctionInfo.h
U lib/Target/AMDGPU/AMDGPUISelLowering.cpp
U lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
U lib/Target/AMDGPU/SIInstrInfo.cpp
U lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
U lib/Target/PowerPC/PPCMIPeephole.cpp
U lib/Target/PowerPC/PPCInstrVSX.td
A lib/Target/ARM/ARMLowOverheadLoops.cpp
U lib/Target/ARM/ARMISelLowering.cpp
U lib/Target/ARM/ARMRegisterInfo.td
U lib/Target/ARM/ARMInstrMVE.td
U lib/Target/ARM/AsmParser/ARMAsmParser.cpp
U lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
U lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
U lib/Target/ARM/Thumb2InstrInfo.cpp
U lib/Target/X86/X86FrameLowering.cpp
U lib/Target/X86/X86TargetTransformInfo.cpp
U lib/Target/AArch64/AArch64FrameLowering.cpp
U lib/Target/AVR/AVRFrameLowering.cpp
U lib/Transforms/Utils/CloneFunction.cpp
U lib/Transforms/InstCombine/InstCombineCompares.cpp
U lib/MC/WinCOFFObjectWriter.cpp
A test/Transforms/HardwareLoops/ARM/revert-after-call.mir
U test/Transforms/HardwareLoops/ARM/calls.ll
A test/Transforms/HardwareLoops/ARM/size-limit.mir
A test/Transforms/HardwareLoops/ARM/multiblock-massive.mir
U test/Transforms/InstCombine/shl-unsigned-cmp-const.ll
A test/Transforms/HardwareLoops/ARM/cond-mov.mir
U lib/Target/PowerPC/PPCMCInstLower.cpp
U lib/Target/PowerPC/PPCISelLowering.cpp
U lib/Target/ARM/ARMInstrInfo.td
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/ARMISelDAGToDAG.cpp
U lib/Target/ARM/ARMISelLowering.h
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
U lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
U lib/Target/ARM/ARMInstrVFP.td
U lib/Target/X86/X86InstrFragmentsSIMD.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/AVR/AVRRegisterInfo.h
U lib/ObjectYAML/ELFYAML.cpp
U lib/Transforms/Utils/LoopUnroll.cpp
U lib/MC/ELFObjectWriter.cpp
U test/Object/X86/nm-coff.s
U test/Transforms/HardwareLoops/ARM/structure.ll
A test/Transforms/HardwareLoops/ARM/massive.mir
U test/Transforms/InstCombine/ispow2.ll
U test/Transforms/LoopUnroll/unloop.ll
A test/MC/AMDGPU/elf-lds.s
U test/MC/COFF/alias.s
D test/CodeGen/AMDGPU/inst-select-load-smrd.mir
D test/CodeGen/AMDGPU/over-max-lds-size.ll
D test/CodeGen/AMDGPU/inst-select-load-flat.mir
U lib/Target/PowerPC/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/Target/ARM/Thumb2ITBlockPass.cpp
U lib/Target/ARM/ARMInstrFormats.td
U lib/Target/ARM/CMakeLists.txt
U lib/Target/ARM/ARMBaseInstrInfo.h
U lib/Target/ARM/ARM.h
U lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
U lib/Target/ARM/Disassembler/ARMDisassembler.cpp
U lib/Target/ARM/ARMInstrThumb2.td
U lib/Target/X86/X86InstrAVX512.td
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/AVR/AVRRegisterInfo.cpp
U lib/BinaryFormat/Wasm.cpp
U lib/Transforms/Scalar/IndVarSimplify.cpp
U lib/MC/WasmObjectWriter.cpp
A test/Transforms/SLPVectorizer/X86/supernode.ll
A test/Transforms/HardwareLoops/ARM/switch.mir
A test/Transforms/HardwareLoops/ARM/revert-after-spill.mir
U test/Transforms/InstCombine/pr17827.ll
A test/Transforms/LoopUnroll/unroll-unconditional-latch.ll
A test/MC/AMDGPU/elf-lds-error.s
U test/MC/COFF/weak-alias-local.s
U test/Transforms/LoopUnroll/runtime-li.ll
U test/MC/COFF/weak.s
U test/Transforms/HardwareLoops/ARM/simple-do.ll
A test/Transforms/InstCombine/shift-amount-reassociation.ll
A test/Transforms/LoopUnroll/partially-unroll-unconditional-latch.ll
U test/MC/COFF/weak-val.s
U test/MC/ARM/mve-fp-registers.s
U test/MC/ARM/fullfp16.s
A test/CodeGen/Thumb2/mve-basic.ll
U test/CodeGen/AMDGPU/local-memory.amdgcn.ll
U test/CodeGen/AMDGPU/target-cpu.ll
U test/CodeGen/AMDGPU/32-bit-local-address-space.ll
U test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
U test/MC/Disassembler/ARM/ras-extension-thumb.txt
A test/MC/ARM/mve-load-store.s
A test/CodeGen/Thumb2/inlineasm-mve.ll
U test/CodeGen/AMDGPU/merge-store-crash.ll
A test/CodeGen/AMDGPU/lds-relocs.ll
U test/CodeGen/AMDGPU/ds_write2.ll
U test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
U test/CodeGen/AMDGPU/promote-alloca-globals.ll
A test/MC/Disassembler/ARM/mve-load-store.txt
U test/MC/ARM/ras-extension.s
A test/MC/ARM/mve-misc.s
A test/CodeGen/Thumb2/mve-bitcasts.ll
A test/CodeGen/AMDGPU/update-phi.ll
U test/CodeGen/AMDGPU/ds_read2.ll
U test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
U test/CodeGen/AMDGPU/shl_add_ptr.ll
A test/MC/Disassembler/ARM/mve-misc.txt
A test/MC/ARM/no-mve.s
A test/MC/ARM/fp-armv8-m.s
A test/CodeGen/Thumb2/inlineasm-error-t-toofewregs-mve.ll
U test/CodeGen/AMDGPU/lds-size.ll
U test/CodeGen/AMDGPU/lds-zero-initializer.ll
U test/CodeGen/AMDGPU/local-memory.ll
U test/CodeGen/AMDGPU/ds-sub-offset.ll
U test/CodeGen/X86/combine-pmuldq.ll
U test/CodeGen/X86/pmul.ll
A test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
U test/CodeGen/AMDGPU/lds-initializer.ll
U test/CodeGen/ARM/inlineasm.ll
A test/CodeGen/ARM/mve-vpt-block3.mir
A test/CodeGen/ARM/mve-vpt-block6.mir
U test/CodeGen/PowerPC/ppc32-pic.ll
A test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
U test/CodeGen/ARM/fast-isel-call.ll
U test/CodeGen/ARM/O3-pipeline.ll
A test/CodeGen/ARM/mve-vpt-block5.mir
U test/CodeGen/PowerPC/select_const.ll
U test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir
U test/CodeGen/ARM/half.ll
A test/CodeGen/ARM/mve-vpt-block2.mir
U test/CodeGen/ARM/no-fpu.ll
A test/CodeGen/PowerPC/tocSaveInPrologue.ll
A test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
U test/CodeGen/AMDGPU/si-sgpr-spill.ll
U test/CodeGen/ARM/fp16-promote.ll
A test/CodeGen/ARM/mve-vpt-block4.mir
A test/CodeGen/PowerPC/sms-iterator.ll
U test/CodeGen/PowerPC/bool-math.ll
U test/CodeGen/X86/avx512-masked-memop-64-32.ll
A test/CodeGen/PowerPC/vector-copysign.ll
U test/CodeGen/X86/avx512-vec-cmp.ll
U test/CodeGen/X86/bitcast-setcc-512.ll
U test/CodeGen/X86/select.ll
U test/CodeGen/X86/avx512-insert-extract.ll
U test/CodeGen/X86/addr-mode-matcher-2.ll
U test/CodeGen/X86/vector-reduce-or-bool.ll
A test/CodeGen/PowerPC/vec-select.ll
U test/CodeGen/X86/ctpop-combine.ll
U test/CodeGen/X86/masked_expandload.ll
A test/CodeGen/X86/peephole-fold-testrr.mir
U test/CodeGen/X86/or-branch.ll
U test/CodeGen/X86/vector-zmov.ll
U test/CodeGen/X86/movmsk-cmp.ll
U test/CodeGen/X86/setcc-lowering.ll
U test/CodeGen/X86/vector-shuffle-512-v8.ll
A test/CodeGen/PowerPC/combine-fneg.ll
U test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
U test/CodeGen/X86/masked_load.ll
U test/CodeGen/X86/vselect.ll
U test/CodeGen/X86/avx512-ext.ll
U test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
U test/CodeGen/X86/cmov-promotion.ll
U test/CodeGen/X86/vector-shuffle-v1.ll
A test/CodeGen/PowerPC/ppc32-secure-plt-tls2.ll
U test/CodeGen/X86/masked_gather_scatter.ll
U test/CodeGen/X86/x86-shrink-wrapping.ll
U test/CodeGen/X86/vector-reduce-and-bool.ll
U test/CodeGen/X86/avx512-fma.ll
U test/CodeGen/X86/masked_compressstore.ll
U test/CodeGen/X86/avx512-mask-op.ll
U test/CodeGen/X86/vector-reduce-xor-bool.ll
U test/CodeGen/X86/sibcall.ll
A test/TableGen/intrinsic-pointer-to-any.td
U test/CodeGen/X86/vector-shuffle-512-v16.ll
U test/CodeGen/AArch64/arm64-popcnt.ll
U test/CodeGen/X86/pr30284.ll
U test/CodeGen/MIR/AMDGPU/machine-function-info.ll
U test/tools/llvm-symbolizer/frame.s
U test/CodeGen/X86/memcmp.ll
U test/CodeGen/X86/bitcast-vector-bool.ll
U test/Analysis/ScalarEvolution/scev-expander-reuse-unroll.ll
Updated to revision 364401.
UPDATING /opt/clang_commandline_docs//src/llvm/llvm/tools/clang CLANG SOURCES
Updating '.':
Skipped 'docs/ClangCommandLineReference.rst' -- Node remains in conflict
D test/CodeGenCXX/devirtualize-dtor-final.cpp
U docs/CommandGuide/clang.rst
U test/SemaTemplate/lambda-capture-pack.cpp
U test/Driver/hip-toolchain-no-rdc.hip
U test/Driver/clang-translation.c
U test/Driver/hip-toolchain-rdc.hip
U test/Driver/print-supported-cpus.c
A test/CodeGenCUDA/hip-pinned-shadow.cu
U test/CodeGen/arm-asm.c
A test/SemaCUDA/hip-pinned-shadow.cu
U test/Analysis/exploded-graph-rewriter/environment.dot
A test/AST/ast-dump-hip-pinned-shadow.cu
U test/CodeGenCXX/dbg-info-all-calls-described.cpp
U test/Misc/pragma-attribute-supported-attributes-list.test
U test/OpenMP/target_teams_distribute_parallel_for_simd_codegen_registration.cpp
U test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp
U test/OpenMP/target_firstprivate_codegen.cpp
U test/OpenMP/target_update_depend_codegen.cpp
U test/OpenMP/target_parallel_depend_codegen.cpp
U test/OpenMP/target_enter_data_depend_codegen.cpp
U test/OpenMP/target_teams_distribute_codegen_registration.cpp
U test/OpenMP/target_teams_distribute_codegen.cpp
U test/OpenMP/target_exit_data_depend_codegen.cpp
U test/OpenMP/target_parallel_codegen.cpp
U test/OpenMP/target_teams_codegen.cpp
U test/OpenMP/target_simd_codegen_registration.cpp
U test/OpenMP/target_parallel_for_codegen_registration.cpp
U test/OpenMP/target_map_codegen.cpp
U test/OpenMP/target_teams_distribute_simd_codegen_registration.cpp
U test/OpenMP/target_parallel_for_codegen.cpp
U test/OpenMP/target_update_codegen.cpp
U test/OpenMP/target_depend_codegen.cpp
U test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp
U test/OpenMP/target_teams_distribute_simd_codegen.cpp
U test/OpenMP/target_teams_distribute_depend_codegen.cpp
U test/OpenMP/target_parallel_for_depend_codegen.cpp
U test/OpenMP/target_parallel_for_simd_codegen_registration.cpp
U test/OpenMP/target_codegen_registration.cpp
U test/OpenMP/target_simd_depend_codegen.cpp
U test/OpenMP/target_parallel_codegen_registration.cpp
U test/OpenMP/target_simd_codegen.cpp
U test/OpenMP/target_parallel_for_simd_depend_codegen.cpp
U test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp
U test/OpenMP/target_parallel_for_simd_codegen.cpp
U test/OpenMP/target_exit_data_codegen.cpp
U test/OpenMP/target_data_codegen.cpp
U test/OpenMP/target_teams_depend_codegen.cpp
U test/OpenMP/target_teams_codegen_registration.cpp
U test/OpenMP/target_enter_data_codegen.cpp
U test/OpenMP/target_codegen.cpp
U include/clang/Basic/Attr.td
U include/clang/Basic/AttrDocs.td
U include/clang/Basic/CodeGenOptions.def
U include/clang/Driver/CC1Options.td
U include/clang/Driver/Options.td
U lib/CodeGen/CGExprCXX.cpp
U include/clang/Tooling/CompilationDatabase.h
U unittests/Tooling/CompilationDatabaseTest.cpp
U lib/CodeGen/TargetInfo.cpp
U lib/CodeGen/BackendUtil.cpp
U lib/Tooling/JSONCompilationDatabase.cpp
U lib/Basic/Targets/ARM.cpp
U lib/Driver/ToolChains/HIP.cpp
U utils/analyzer/exploded-graph-rewriter.py
U lib/CodeGen/CGDebugInfo.cpp
U lib/Tooling/CMakeLists.txt
U lib/Frontend/CompilerInvocation.cpp
U lib/Sema/SemaDeclAttr.cpp
U lib/Driver/Driver.cpp
U bindings/python/tests/cindex/test_cdb.py
U lib/CodeGen/CGOpenMPRuntime.cpp
U lib/CodeGen/CodeGenModule.cpp
U lib/CodeGen/CGStmtOpenMP.cpp
A lib/Tooling/GuessTargetAndModeCompilationDatabase.cpp
U lib/Sema/TreeTransform.h
U lib/Driver/ToolChains/Arch/X86.cpp
Updated to revision 364401.
Summary of conflicts:
Skipped paths: 1
-- Could NOT find Z3: Found unsuitable version "0.0.0", but required is at least "4.7.1" (found Z3_LIBRARIES-NOTFOUND)
-- Native target architecture is X86
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-- Could NOT find OCaml (missing: OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH)
-- OCaml bindings disabled.
-- LLVM host triple: x86_64-unknown-linux-gnu
-- LLVM default target triple: x86_64-unknown-linux-gnu
-- Building with -fPIC
-- Constructing LLVMBuild project information
-- Linker detection: GNU ld
-- Targeting AArch64
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-- Clang version: 9.0.0
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-- git Version: v0.0.0
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-- Performing Test HAVE_GNU_POSIX_REGEX -- failed to compile
-- Performing Test HAVE_POSIX_REGEX -- success
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