[www-scripts] Clang Attribute Doc Update: ERROR
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Mon Jun 17 03:02:02 PDT 2019
UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
U test/ThinLTO/X86/lit.local.cfg
U test/Analysis/CostModel/X86/lit.local.cfg
U test/Analysis/CostModel/RISCV/lit.local.cfg
U test/Analysis/CostModel/ARM/lit.local.cfg
U test/Analysis/CostModel/PowerPC/lit.local.cfg
U test/ExecutionEngine/RuntimeDyld/X86/lit.local.cfg
U test/ExecutionEngine/RuntimeDyld/AArch64/lit.local.cfg
U test/ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg
U test/ExecutionEngine/RuntimeDyld/SystemZ/lit.local.cfg
U test/ExecutionEngine/RuntimeDyld/ARM/lit.local.cfg
U test/ExecutionEngine/RuntimeDyld/PowerPC/lit.local.cfg
U test/ExecutionEngine/JITLink/X86/lit.local.cfg
U test/tools/llvm-objdump/Mips/lit.local.cfg
U test/tools/llvm-mca/X86/lit.local.cfg
U test/tools/llvm-mca/SystemZ/lit.local.cfg
U test/tools/llvm-lib/lit.local.cfg
U test/tools/llvm-lto2/X86/lit.local.cfg
U test/tools/llvm-readobj/ARM/lit.local.cfg
U test/tools/llvm-readobj/AArch64/lit.local.cfg
U test/DebugInfo/MIR/ARM/lit.local.cfg
U test/DebugInfo/MIR/AArch64/lit.local.cfg
U test/DebugInfo/MIR/Mips/lit.local.cfg
U test/DebugInfo/ARM/lit.local.cfg
U test/DebugInfo/AArch64/lit.local.cfg
U test/DebugInfo/SystemZ/lit.local.cfg
U test/Object/X86/lit.local.cfg
U test/Other/X86/lit.local.cfg
U test/Transforms/CodeExtractor/X86/lit.local.cfg
U test/Transforms/InferAddressSpaces/AMDGPU/lit.local.cfg
U test/Transforms/HotColdSplit/X86/lit.local.cfg
U test/Transforms/InstCombine/PowerPC/lit.local.cfg
U test/Transforms/AtomicExpand/AArch64/lit.local.cfg
U test/Transforms/AtomicExpand/ARM/lit.local.cfg
U test/Transforms/ArgumentPromotion/X86/lit.local.cfg
U test/Transforms/DivRemPairs/PowerPC/lit.local.cfg
U test/Transforms/DivRemPairs/X86/lit.local.cfg
U test/Transforms/Inline/X86/lit.local.cfg
U test/Transforms/Inline/PowerPC/lit.local.cfg
U test/Transforms/LoopIdiom/X86/lit.local.cfg
U test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg
U test/Transforms/PGOProfile/X86/lit.local.cfg
U test/Transforms/ExpandMemCmp/X86/lit.local.cfg
U test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/lit.local.cfg
U test/Transforms/SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg
U test/Transforms/GlobalOpt/PowerPC/lit.local.cfg
U test/Transforms/LoopUnroll/X86/lit.local.cfg
U test/Transforms/LoopUnroll/AMDGPU/lit.local.cfg
U test/Transforms/LoopUnroll/PowerPC/lit.local.cfg
U test/Transforms/LoopUnroll/ARM/lit.local.cfg
U test/Transforms/LoopUnroll/AArch64/lit.local.cfg
U test/Transforms/LoopUnroll/Hexagon/lit.local.cfg
U test/Transforms/SLPVectorizer/SystemZ/lit.local.cfg
U test/Transforms/SLPVectorizer/X86/lit.local.cfg
U test/Transforms/SLPVectorizer/AMDGPU/lit.local.cfg
U test/Transforms/LoopStrengthReduce/AMDGPU/lit.local.cfg
U test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg
U test/Transforms/LoopStrengthReduce/X86/lit.local.cfg
U test/Transforms/CodeGenPrepare/AArch64/lit.local.cfg
U test/Transforms/CodeGenPrepare/AMDGPU/lit.local.cfg
U test/Transforms/CodeGenPrepare/ARM/lit.local.cfg
U test/Transforms/CodeGenPrepare/X86/lit.local.cfg
U test/Transforms/HardwareLoops/ARM/lit.local.cfg
U test/Transforms/SimplifyCFG/sink-common-code.ll
U test/Transforms/SimplifyCFG/X86/lit.local.cfg
U test/Transforms/SimplifyCFG/SPARC/lit.local.cfg
U test/Transforms/ConstantHoisting/PowerPC/lit.local.cfg
U test/Transforms/ConstantHoisting/X86/lit.local.cfg
U test/Transforms/LoopVectorize/PowerPC/lit.local.cfg
U test/Transforms/LoopVectorize/ARM/lit.local.cfg
U test/Transforms/LoopVectorize/X86/lit.local.cfg
U test/Transforms/LoopVectorize/AArch64/lit.local.cfg
U test/Transforms/SafeStack/X86/lit.local.cfg
U test/Transforms/SafeStack/AArch64/lit.local.cfg
U test/Transforms/SafeStack/ARM/lit.local.cfg
U test/Transforms/StackProtector/X86/lit.local.cfg
U test/Transforms/LoadStoreVectorizer/X86/lit.local.cfg
U test/Transforms/LoadStoreVectorizer/AMDGPU/lit.local.cfg
U test/Transforms/LoadStoreVectorizer/NVPTX/lit.local.cfg
U test/MC/ARM/AlignedBundling/lit.local.cfg
U test/MC/ARM/lit.local.cfg
U test/MC/Lanai/lit.local.cfg
U test/MC/X86/AlignedBundling/lit.local.cfg
U test/MC/MSP430/lit.local.cfg
U test/MC/RISCV/lit.local.cfg
U test/MC/MachO/lit.local.cfg
U test/MC/MachO/ARM/lit.local.cfg
U test/MC/MachO/AArch64/lit.local.cfg
U test/MC/Hexagon/lit.local.cfg
U test/MC/AsmParser/lit.local.cfg
U test/MC/ELF/lit.local.cfg
U test/MC/BPF/lit.local.cfg
U test/MC/Mips/lit.local.cfg
U test/MC/Sparc/lit.local.cfg
U test/MC/Disassembler/Lanai/lit.local.cfg
U test/MC/Disassembler/X86/lit.local.cfg
U test/MC/Disassembler/MSP430/lit.local.cfg
U test/MC/Disassembler/RISCV/lit.local.cfg
U test/MC/Disassembler/AArch64/lit.local.cfg
U test/MC/Disassembler/Mips/lit.local.cfg
U test/MC/Disassembler/Sparc/lit.local.cfg
U test/MC/Disassembler/Hexagon/lit.local.cfg
U test/MC/Disassembler/WebAssembly/lit.local.cfg
U test/MC/Disassembler/SystemZ/lit.local.cfg
U test/MC/Disassembler/ARM/lit.local.cfg
U test/MC/Disassembler/PowerPC/lit.local.cfg
U test/MC/COFF/lit.local.cfg
U test/MC/COFF/ARM/lit.local.cfg
U test/Instrumentation/AddressSanitizer/X86/lit.local.cfg
U test/Instrumentation/InstrProfiling/X86/lit.local.cfg
U test/CodeGen/SPARC/lit.local.cfg
U test/CodeGen/Mips/lit.local.cfg
A test/ObjectYAML/MachO/virtual_section.yaml
U test/tools/llvm-objdump/X86/print-symbol-addr.s
U test/tools/llvm-objdump/PowerPC/branch-offset.s
U test/tools/llvm-mca/lit.local.cfg
U test/tools/dsymutil/ARM/lit.local.cfg
U test/tools/llvm-objcopy/ELF/cross-arch-headers.test
U test/tools/llvm-mc/lit.local.cfg
U test/DebugInfo/X86/dw_op_minus.mir
U test/DebugInfo/X86/debug-loc-asan.mir
U test/DebugInfo/X86/prolog-params.mir
U test/DebugInfo/X86/debug-loc-offset.mir
U test/DebugInfo/X86/pr19307.mir
U test/DebugInfo/X86/live-debug-vars-dse.mir
U test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
U test/DebugInfo/MIR/lit.local.cfg
U test/DebugInfo/MIR/X86/debug-loc-0.mir
U test/DebugInfo/MIR/X86/live-debug-values-restore.mir
U test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
U test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
U test/DebugInfo/MIR/X86/kill-after-spill.mir
U test/DebugInfo/MIR/Mips/last-inst-bundled.mir
U test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
U test/DebugInfo/ARM/cfi-eof-prologue.mir
U test/DebugInfo/AArch64/asan-stack-vars.mir
U test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
U test/DebugInfo/Generic/lit.local.cfg
U test/JitListener/lit.local.cfg
U test/Transforms/InstCombine/with_overflow.ll
U test/Transforms/ThinLTOBitcodeWriter/x86/lit.local.cfg
U test/Transforms/CodeGenPrepare/X86/vec-shift.ll
A test/Transforms/SimplifyCFG/switch-profmd.ll
U test/Transforms/InstSimplify/call.ll
U test/MC/AVR/lit.local.cfg
U test/MC/Disassembler/ARC/lit.local.cfg
U test/MC/COFF/cv-loc-unreachable-2.s
U test/MC/COFF/cv-loc-unreachable.s
U test/CodeGen/ARC/lit.local.cfg
U test/CodeGen/Mips/micromips-eva.mir
U test/CodeGen/Mips/micromips-short-delay-slot.mir
U test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
U test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir
U test/CodeGen/Mips/GlobalISel/instruction-select/pointers.mir
U test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
U test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
U test/CodeGen/Mips/GlobalISel/legalizer/add.mir
U test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
U test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
U test/CodeGen/Mips/GlobalISel/legalizer/pointers.mir
U test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir
U test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.mir
U test/CodeGen/Mips/micromips-sizereduction/micromips-no-lwp-swp.mir
U test/CodeGen/WinEH/lit.local.cfg
U test/CodeGen/Generic/lit.local.cfg
U test/CodeGen/SystemZ/lit.local.cfg
U test/CodeGen/PowerPC/lit.local.cfg
U test/CodeGen/ARM/cmpxchg-idioms.ll
U test/CodeGen/ARM/lit.local.cfg
U test/CodeGen/Thumb/lit.local.cfg
U test/CodeGen/XCore/lit.local.cfg
U test/CodeGen/Lanai/lit.local.cfg
U test/CodeGen/X86/GC/lit.local.cfg
U test/CodeGen/AMDGPU/llvm.memcpy.ll
A test/CodeGen/AMDGPU/smrd-gfx10.ll
U test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
U test/CodeGen/PowerPC/setcr_bc2.mir
U test/CodeGen/PowerPC/setcr_bc.mir
U test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir
U test/CodeGen/ARM/constant-island-movwt.mir
U test/CodeGen/ARM/fp16-litpool-thumb.mir
U test/CodeGen/X86/shrink_wrap_dbg_value.mir
U test/CodeGen/X86/vector-shift-lshr-128.ll
U test/CodeGen/X86/lit.local.cfg
U test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
U test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
U test/CodeGen/MSP430/lit.local.cfg
U test/CodeGen/MIR/Generic/lit.local.cfg
U test/CodeGen/AArch64/win64-jumptable.ll
U test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
U test/CodeGen/AMDGPU/smrd.ll
U test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
U test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
U test/CodeGen/SystemZ/debuginstr-02.mir
U test/CodeGen/PowerPC/spe.ll
U test/CodeGen/ARM/fp16-litpool3-arm.mir
U test/CodeGen/ARM/register-scavenger-exceptions.mir
U test/CodeGen/X86/known-signbits-vector.ll
U test/CodeGen/X86/avoid-sfb-offset.mir
U test/CodeGen/X86/cast-vsel.ll
U test/CodeGen/X86/pr30821.mir
U test/CodeGen/X86/GlobalISel/x86-select-srem.mir
U test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
U test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
U test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
U test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
U test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
U test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
U test/CodeGen/SystemZ/subregliveness-06.mir
U test/CodeGen/PowerPC/setcr_bc3.mir
U test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
U test/CodeGen/ARM/fp16-litpool2-arm.mir
U test/CodeGen/ARM/fp16-litpool-arm.mir
U test/CodeGen/Thumb/PR36658.mir
A test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
U test/CodeGen/X86/vselect-avx.ll
U test/CodeGen/X86/win_coreclr_chkstk_liveins.mir
U test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
U test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
U test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
U test/CodeGen/X86/movtopush.mir
U test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
U test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
U test/CodeGen/X86/GlobalISel/x86-select-urem.mir
U test/CodeGen/X86/PR37310.mir
U test/CodeGen/AArch64/max-jump-table.ll
U test/CodeGen/AArch64/min-jump-table.ll
U test/CodeGen/AVR/lit.local.cfg
U test/CodeGen/Hexagon/lit.local.cfg
U test/CodeGen/Thumb2/lit.local.cfg
U test/CodeGen/X86/vector-shift-by-select-loop.ll
U test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
U test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
U test/CodeGen/MIR/AMDGPU/stack-id.mir
U test/CodeGen/X86/prologepilog_deref_size.mir
U test/CodeGen/MIR/X86/fixed-stack-di.mir
U test/CodeGen/MIR/X86/diexpr-win32.mir
U test/CodeGen/AArch64/wineh6.mir
U test/CodeGen/MIR/X86/fixed-stack-objects.mir
U test/CodeGen/MIR/X86/stack-objects.mir
U test/CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir
U test/CodeGen/AArch64/wineh-frame5.mir
U test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir
U test/CodeGen/X86/regalloc-copy-hints.mir
U test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
U test/CodeGen/MIR/X86/branch-folder-with-label.mir
U test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
U test/CodeGen/MIR/AMDGPU/target-flags.mir
U test/CodeGen/AArch64/wineh7.mir
U test/CodeGen/AArch64/GlobalISel/call-translator.ll
U test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
U test/CodeGen/AArch64/cfi_restore.mir
U test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
U test/CodeGen/AArch64/wineh4.mir
U test/CodeGen/Thumb2/ifcvt-cbz.mir
U include/llvm/CodeGen/TargetFrameLowering.h
U test/CodeGen/AArch64/wineh-frame6.mir
U test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
U test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-tiny.mir
U test/CodeGen/AArch64/wineh1.mir
U test/CodeGen/AArch64/wineh2.mir
U test/CodeGen/AArch64/spill-stack-realignment.mir
U test/CodeGen/AArch64/stack-id-pei-alloc.mir
U test/CodeGen/Thumb2/high-reg-spill.mir
U include/llvm/CodeGen/MIRYamlMapping.h
U test/CodeGen/AArch64/branch-target-enforcment.mir
U test/CodeGen/AArch64/wineh8.mir
U test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
U test/CodeGen/AArch64/wineh-frame8.mir
U test/CodeGen/AArch64/stack-id-stackslot-scavenging.mir
U test/CodeGen/AArch64/wineh3.mir
U test/CodeGen/AArch64/wineh5.mir
U test/CodeGen/Thumb2/peephole-cmp.mir
U include/llvm/MC/MCExpr.h
U include/llvm/IR/IntrinsicsAMDGPU.td
U test/CodeGen/AArch64/wineh_shrinkwrap.mir
U test/CodeGen/AArch64/wineh-frame7.mir
U test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
U test/CodeGen/AArch64/reverse-csr-restore-seq.mir
U test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir
U include/llvm/CodeGen/AsmPrinter.h
D lib/Target/ARM/ARMComputeBlockSize.cpp
U tools/llvm-objcopy/CopyConfig.cpp
U lib/Analysis/InstructionSimplify.cpp
U lib/Target/AMDGPU/SIInstructions.td
U lib/Target/AMDGPU/SIShrinkInstructions.cpp
U lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
U lib/Target/AMDGPU/SIDefines.h
U lib/Target/AMDGPU/SIInstrInfo.h
U tools/llvm-objdump/llvm-objdump.cpp
U lib/MC/MCExpr.cpp
U lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
U lib/Target/AMDGPU/SIInsertWaitcnts.cpp
U lib/Target/AMDGPU/SILowerControlFlow.cpp
U lib/Target/AMDGPU/SIInstrInfo.cpp
U lib/Target/AMDGPU/SIFrameLowering.h
U lib/Transforms/Utils/SimplifyCFG.cpp
U lib/Target/AMDGPU/SIFrameLowering.cpp
U lib/Target/AMDGPU/SIInsertSkips.cpp
U lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
U lib/Target/AMDGPU/SIRegisterInfo.cpp
U lib/Target/AMDGPU/SMInstructions.td
U lib/Target/AMDGPU/SIISelLowering.cpp
U tools/yaml2obj/yaml2macho.cpp
U lib/Target/AMDGPU/SIPeepholeSDWA.cpp
U lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
U lib/Target/AMDGPU/SIRegisterInfo.h
U lib/Target/AMDGPU/SIWholeQuadMode.cpp
U lib/Target/AMDGPU/SILowerI1Copies.cpp
U lib/Target/AMDGPU/SIInstrInfo.td
U lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
U lib/Target/PowerPC/PPCISelLowering.cpp
U lib/Target/PowerPC/PPCCallingConv.cpp
A lib/Target/ARM/ARMBasicBlockInfo.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineFrameInfo.cpp
U lib/Target/AMDGPU/AMDGPUSubtarget.h
U lib/Target/PowerPC/PPCInstrInfo.td
U lib/Target/PowerPC/PPCInstrSPE.td
U lib/Target/ARM/ARMBasicBlockInfo.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/CodeGen/CodeGenPrepare.cpp
U lib/Target/AMDGPU/SIISelLowering.h
U lib/Target/PowerPC/PPCCallingConv.td
U lib/Target/ARM/CMakeLists.txt
U lib/Target/X86/X86InstrFoldTables.cpp
U lib/CodeGen/MIRPrinter.cpp
U lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
U lib/Target/PowerPC/PPCISelLowering.h
U lib/Target/ARM/ARM.h
U lib/Target/ARM/ARMConstantIslandPass.cpp
U lib/CodeGen/MIRParser/MIRParser.cpp
Updated to revision 363539.
UPDATING /opt/clang_commandline_docs//src/llvm/llvm/tools/clang CLANG SOURCES
Updating '.':
Skipped 'docs/ClangCommandLineReference.rst' -- Node remains in conflict
U test/CodeGenCXX/stack-reuse-exceptions.cpp
U test/CodeGenCXX/nrvo.cpp
U test/CodeGenObjC/exceptions.m
U docs/ReleaseNotes.rst
U lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
U test/Analysis/inlining/placement-new-fp-suppression.cpp
U test/Analysis/diagnostics/track_subexpressions.cpp
Updated to revision 363539.
Summary of conflicts:
Skipped paths: 1
-- Could NOT find Z3: Found unsuitable version "0.0.0", but required is at least "4.7.1" (found Z3_LIBRARIES-NOTFOUND)
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-- LLVM host triple: x86_64-unknown-linux-gnu
-- LLVM default target triple: x86_64-unknown-linux-gnu
-- Building with -fPIC
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-- Performing Test HAVE_POSIX_REGEX -- success
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-- Build files have been written to: /opt/clang_commandline_docs/build/llvm
BUILDING LLVM CLANG
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