[www-scripts] Clang Attribute Doc Update: ERROR
LLVM via www-scripts
www-scripts at lists.llvm.org
Thu Jun 6 03:02:06 PDT 2019
UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
U unittests/Analysis/LoopInfoTest.cpp
U lib/Target/Mips/MipsRegisterBankInfo.cpp
U lib/Target/Mips/MipsInstructionSelector.cpp
U lib/Target/Mips/MipsLegalizerInfo.cpp
U lib/Target/AMDGPU/SIRegisterInfo.h
U lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
U lib/Target/AMDGPU/SIRegisterInfo.cpp
U lib/Target/AMDGPU/SIFrameLowering.cpp
U lib/Target/AMDGPU/SIISelLowering.cpp
U lib/Target/AMDGPU/SIMachineFunctionInfo.h
U lib/Target/AMDGPU/AMDGPUSubtarget.cpp
U lib/Target/AMDGPU/SIInstrInfo.cpp
U lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
U lib/Target/AMDGPU/SIFrameLowering.h
A test/Analysis/CostModel/RISCV
U lib/Target/AMDGPU/SIInstrInfo.h
U lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
U lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
U lib/Target/SystemZ/SystemZOperators.td
U lib/Target/SystemZ/SystemZInstrFP.td
U lib/Target/SystemZ/SystemZInstrVector.td
U lib/Target/SystemZ/SystemZISelLowering.cpp
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86InstrAVX512.td
U lib/Target/AArch64/AArch64InstructionSelector.cpp
U lib/Support/ARMTargetParser.cpp
U lib/Transforms/Utils/InlineFunction.cpp
U lib/Transforms/Utils/LoopUtils.cpp
U lib/Transforms/Instrumentation/MemorySanitizer.cpp
U lib/Transforms/Scalar/NewGVN.cpp
U lib/Transforms/IPO/Attributor.cpp
U lib/Transforms/InstCombine/InstCombineCalls.cpp
U lib/Transforms/InstCombine/InstCombineCasts.cpp
U lib/Transforms/Vectorize/SLPVectorizer.cpp
U lib/CodeGen/MIRPrinter.cpp
U lib/CodeGen/ScheduleDAGInstrs.cpp
U lib/CodeGen/MachinePipeliner.cpp
U lib/CodeGen/ExpandReductions.cpp
U lib/CodeGen/MIRParser/MILexer.h
U lib/CodeGen/MIRParser/MIParser.cpp
U lib/CodeGen/MIRParser/MILexer.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/TargetInstrInfo.cpp
U lib/CodeGen/GlobalISel/LegalizerHelper.cpp
U lib/CodeGen/GlobalISel/InstructionSelector.cpp
U lib/CodeGen/MachineInstr.cpp
U lib/CodeGen/ImplicitNullChecks.cpp
U lib/CodeGen/MachineCSE.cpp
U lib/CodeGen/PeepholeOptimizer.cpp
U lib/CodeGen/TargetLoweringBase.cpp
U lib/IR/Function.cpp
A test/Analysis/CostModel/RISCV/gep.ll
A test/tools/yaml2obj/implicit-sections.test
U test/Transforms/IndVarSimplify/loop_evaluate_1.ll
U test/Transforms/LoopVectorize/AArch64/pr36032.ll
U test/Transforms/LoopReroll/ptrindvar.ll
U test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
U test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
U test/Transforms/IRCE/bad_expander.ll
U test/Transforms/IRCE/unsigned_comparisons_ugt.ll
U test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
U test/Transforms/LoopReroll/complex_reroll.ll
U test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
U test/Transforms/LoopStrengthReduce/X86/nested-loop.ll
A test/Transforms/InstCombine/byval.ll
A test/CodeGen/Mips/GlobalISel/instruction-select/fpext_and_fptrunc.mir
A test/CodeGen/Mips/GlobalISel/legalizer/fabs.mir
A test/CodeGen/Mips/GlobalISel/llvm-ir/fpext_and_fptrunc.ll
A test/CodeGen/Mips/GlobalISel/regbankselect/fabs.mir
U test/CodeGen/AMDGPU/large-work-group-promote-alloca.ll
U test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
U test/Transforms/IRCE/rc-negative-bound.ll
U test/Transforms/IRCE/single-access-no-preloop.ll
U test/Transforms/IRCE/unsigned_comparisons_ult.ll
U test/Instrumentation/MemorySanitizer/msan_basic.ll
A test/CodeGen/Mips/GlobalISel/legalizer/fpext_and_fptrunc.mir
A test/CodeGen/Mips/GlobalISel/llvm-ir/ceil_and_floor.ll
A test/CodeGen/Mips/GlobalISel/regbankselect/fpext_and_fptrunc.mir
U test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
U test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
U lib/Bitcode/Writer/ValueEnumerator.cpp
U lib/Analysis/LoopInfo.cpp
A test/tools/llvm-objdump/X86/section-filter-disasm.test
U test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
U test/CodeGen/AMDGPU/frame-index-elimination.ll
U test/CodeGen/AMDGPU/nested-calls.ll
U test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
U test/CodeGen/AMDGPU/spill-empty-live-interval.mir
U test/CodeGen/AMDGPU/byval-frame-setup.ll
U test/CodeGen/WebAssembly/load-store-pic.ll
U test/tools/llvm-readobj/gnu-hash-symbols.test
U test/Transforms/IndVarSimplify/lftr.ll
U test/Transforms/LoopReroll/nonconst_lb.ll
A test/Transforms/NewGVN/addrspacecast.ll
U test/Transforms/LoopIdiom/basic.ll
U test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
U test/Transforms/IRCE/conjunctive-checks.ll
U test/Transforms/IRCE/decrementing-loop.ll
U test/Transforms/SLPVectorizer/X86/broadcast.ll
A test/CodeGen/Mips/GlobalISel/instruction-select/fabs.mir
A test/CodeGen/Mips/GlobalISel/legalizer/fcmp.mir
A test/CodeGen/Mips/GlobalISel/llvm-ir/fabs.ll
A test/CodeGen/Mips/GlobalISel/regbankselect/fcmp.mir
U test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
U test/CodeGen/AMDGPU/multi-dword-vgpr-spill.ll
U test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
U test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
U test/CodeGen/AMDGPU/stack-realign.ll
A test/CodeGen/AMDGPU/sp-too-many-input-sgprs.ll
U test/CodeGen/WebAssembly/address-offsets.ll
U lib/Bitcode/Reader/BitcodeReader.cpp
U lib/Analysis/ScalarEvolutionExpander.cpp
U test/tools/llvm-objdump/X86/section-filter-relocs.test
U test/tools/llvm-readobj/demangle.test
A test/Transforms/IndVarSimplify/infer-poison-flags.ll
U test/Transforms/LoopReroll/basic.ll
U test/Transforms/Reassociate/fast-basictest.ll
U test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll
U test/Transforms/IRCE/single-access-with-preloop.ll
U test/Transforms/IRCE/stride_more_than_1.ll
U test/Transforms/IRCE/ranges_of_different_types.ll
U test/Transforms/EarlyCSE/commute.ll
A test/CodeGen/Mips/GlobalISel/instruction-select/fcmp.mir
A test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir
A test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll
U test/CodeGen/AMDGPU/sibling-call.ll
U test/CodeGen/AMDGPU/store-hi16.ll
U test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
U test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
U test/CodeGen/AMDGPU/call-argument-types.ll
U test/CodeGen/AMDGPU/spill-offset-calculation.ll
U test/CodeGen/AMDGPU/load-hi16.ll
U test/CodeGen/WebAssembly/call-pic.ll
U test/CodeGen/AMDGPU/load-lo16.ll
U test/CodeGen/AMDGPU/callee-frame-setup.ll
U test/CodeGen/AMDGPU/function-args.ll
A test/CodeGen/SystemZ/fp-strict-conv-03.ll
A test/CodeGen/SystemZ/vec-strict-sub-01.ll
A test/CodeGen/SystemZ/vec-strict-sub-02.ll
A test/CodeGen/SystemZ/fp-strict-div-01.ll
A test/CodeGen/SystemZ/vec-strict-add-02.ll
A test/CodeGen/SystemZ/fp-strict-sqrt-01.ll
A test/CodeGen/SystemZ/fp-strict-mul-09.ll
A test/CodeGen/SystemZ/fp-strict-sub-03.ll
A test/CodeGen/SystemZ/fp-strict-sub-04.ll
A test/CodeGen/SystemZ/vec-strict-add-01.ll
A test/CodeGen/SystemZ/fp-strict-mul-10.ll
A test/CodeGen/SystemZ/fp-strict-div-02.ll
A test/CodeGen/SystemZ/fp-strict-add-01.ll
U test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
A test/CodeGen/SystemZ/fp-strict-conv-04.ll
A test/CodeGen/SystemZ/vec-strict-min-01.ll
A test/CodeGen/SystemZ/fp-strict-add-04.ll
A test/CodeGen/SystemZ/fp-strict-conv-15.ll
A test/CodeGen/SystemZ/fp-strict-sub-02.ll
A test/CodeGen/SystemZ/fp-strict-round-03.ll
A test/CodeGen/SystemZ/fp-strict-add-02.ll
A test/CodeGen/SystemZ/fp-strict-add-03.ll
A test/CodeGen/SystemZ/fp-strict-mul-01.ll
A test/CodeGen/SystemZ/vec-strict-max-01.ll
A test/CodeGen/SystemZ/fp-strict-mul-02.ll
D test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
A test/CodeGen/SystemZ/vec-strict-div-01.ll
A test/CodeGen/SystemZ/fp-strict-div-04.ll
A test/CodeGen/SystemZ/fp-strict-mul-04.ll
A test/CodeGen/SystemZ/vec-strict-round-02.ll
A test/CodeGen/SystemZ/vec-strict-mul-04.ll
A test/CodeGen/SystemZ/vec-strict-mul-05.ll
A test/CodeGen/SystemZ/fp-strict-div-03.ll
A test/CodeGen/SystemZ/vec-strict-mul-01.ll
A test/CodeGen/SystemZ/vec-strict-round-01.ll
A test/CodeGen/SystemZ/fp-strict-sqrt-04.ll
A test/CodeGen/SystemZ/fp-strict-mul-06.ll
A test/CodeGen/SystemZ/fp-strict-conv-01.ll
A test/CodeGen/SystemZ/vec-strict-sqrt-02.ll
A test/CodeGen/SystemZ/fp-strict-mul-11.ll
A test/CodeGen/SystemZ/fp-strict-mul-03.ll
A test/CodeGen/SystemZ/fp-strict-sqrt-03.ll
A test/CodeGen/SystemZ/fp-strict-alias.ll
A test/CodeGen/SystemZ/vec-strict-mul-03.ll
A test/CodeGen/SystemZ/fp-strict-mul-07.ll
A test/CodeGen/SystemZ/fp-strict-sub-01.ll
A test/CodeGen/SystemZ/fp-strict-sqrt-02.ll
A test/CodeGen/SystemZ/vec-strict-div-02.ll
A test/CodeGen/SystemZ/vec-strict-mul-02.ll
A test/CodeGen/SystemZ/fp-strict-mul-05.ll
A test/CodeGen/SystemZ/vec-strict-sqrt-01.ll
A test/CodeGen/SystemZ/fp-strict-round-01.ll
A test/CodeGen/SystemZ/fp-strict-mul-08.ll
U test/CodeGen/X86/oddshuffles.ll
A test/CodeGen/X86/merge-consecutive-stores-nt.ll
U test/CodeGen/X86/vector-reduce-smin-widen.ll
U test/CodeGen/X86/vector-reduce-smax-widen.ll
U test/CodeGen/X86/vector-reduce-umin-widen.ll
U test/CodeGen/X86/vector-reduce-smax.ll
U test/CodeGen/X86/horizontal-reduce-umax.ll
U test/CodeGen/X86/vector-reduce-umin.ll
U test/CodeGen/X86/machine-combiner-int-vec.ll
U test/CodeGen/X86/x86-interleaved-access.ll
U test/CodeGen/X86/vector-reduce-smin.ll
U test/CodeGen/X86/vector-reduce-umax.ll
U test/CodeGen/X86/horizontal-reduce-smin.ll
U test/CodeGen/X86/fdiv.ll
A test/CodeGen/SystemZ/fp-strict-round-02.ll
U test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
U test/CodeGen/X86/masked_load.ll
U test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
U test/CodeGen/X86/horizontal-reduce-umin.ll
U test/CodeGen/X86/dag-fmf-cse.ll
U test/CodeGen/X86/pr29112.ll
A test/CodeGen/SystemZ/fp-strict-conv-02.ll
U test/CodeGen/X86/memset-nonzero.ll
U test/CodeGen/X86/vector-shuffle-256-v32.ll
U test/CodeGen/X86/horizontal-reduce-smax.ll
U test/CodeGen/X86/avx512-shuffles/partial_permute.ll
U test/CodeGen/X86/vector-reduce-umax-widen.ll
U test/CodeGen/X86/fp-fold.ll
U test/CodeGen/MIR/AMDGPU/machine-function-info.ll
U test/CodeGen/AVR/load.ll
U test/CodeGen/Hexagon/tstbit.ll
U include/llvm/Support/ARMTargetParser.h
U include/llvm/Target/Target.td
U include/llvm/Transforms/Utils/LoopUtils.h
U test/CodeGen/AArch64/GlobalISel/select-zextload.mir
U test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll
U include/llvm/IR/Function.h
U include/llvm/Target/TargetSelectionDAG.td
U include/llvm/Transforms/Utils/Cloning.h
U utils/UpdateTestChecks/asm.py
A test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
U test/CodeGen/Hexagon/ntstbit.ll
U include/llvm/IR/InstrTypes.h
U include/llvm/Analysis/LoopInfo.h
U include/llvm/CodeGen/SelectionDAGNodes.h
U test/CodeGen/Hexagon/isel-prefer.ll
U include/llvm/IR/Argument.h
U include/llvm/Analysis/ScalarEvolutionExpander.h
U include/llvm/CodeGen/MachineInstr.h
U include/llvm/MC/MCInstrDesc.h
U utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn
U tools/llvm-objdump/llvm-objdump.cpp
U tools/yaml2obj/yaml2elf.cpp
U utils/TableGen/InstrInfoEmitter.cpp
U tools/llvm-size/llvm-size.cpp
U utils/TableGen/CodeGenInstruction.h
U tools/dsymutil/MachOUtils.cpp
U docs/AMDGPUUsage.rst
U utils/TableGen/CodeGenInstruction.cpp
U tools/dsymutil/MachOUtils.h
Updated to revision 362691.
UPDATING /opt/clang_commandline_docs//src/llvm/llvm/tools/clang CLANG SOURCES
Updating '.':
Skipped 'docs/ClangCommandLineReference.rst' -- Node remains in conflict
U lib/Serialization/ASTWriterStmt.cpp
U lib/Serialization/ASTReaderStmt.cpp
U lib/Frontend/Rewrite/RewriteObjC.cpp
U lib/Frontend/Rewrite/RewriteModernObjC.cpp
U lib/Sema/SemaExprMember.cpp
U lib/AST/DeclBase.cpp
U lib/AST/Expr.cpp
U docs/LibASTMatchersTutorial.rst
U docs/ClangFormatStyleOptions.rst
U lib/Driver/ToolChains/Arch/ARM.cpp
U lib/Driver/ToolChains/Arch/ARM.h
U lib/Driver/ToolChains/WebAssembly.cpp
U lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
U lib/CodeGen/CGCall.cpp
U lib/CodeGen/CGBuiltin.cpp
U lib/Headers/CMakeLists.txt
A lib/Headers/enqcmdintrin.h
U lib/Headers/immintrin.h
U lib/Headers/cpuid.h
U lib/Basic/Targets/X86.cpp
U lib/Basic/Targets/X86.h
U lib/Sema/SemaExprCXX.cpp
U lib/Sema/SemaInit.cpp
U lib/Sema/SemaOverload.cpp
U lib/Sema/SemaType.cpp
U lib/AST/TypePrinter.cpp
U test/Driver/x86-target-features.c
U test/Driver/armv8.1m.main.c
U test/Driver/armv8.1m.main.s
U test/CodeGenCUDA/kernel-args.cu
U test/CodeGenCUDA/kernel-args-alignment.cu
U test/CodeGenObjC/local-static-block.m
U test/Preprocessor/x86_target_features.c
U test/CodeGenCXX/wasm-args-returns.cpp
U test/CodeGenCXX/x86_32-arguments.cpp
U test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp
U test/CodeGenCXX/regcall.cpp
U test/CodeGen/struct-passing.c
U test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp
U test/CodeGenCXX/x86_64-arguments-avx.cpp
U test/SemaOpenCLCXX/address-space-deduction.cl
U test/CodeGenCXX/regparm.cpp
U test/CodeGenCXX/ms-inline-asm-fields.cpp
U test/OpenMP/nvptx_unsupported_type_codegen.cpp
U cmake/caches/DistributionExample-stage2.cmake
U include/clang/AST/Expr.h
U include/clang/AST/Stmt.h
U test/CodeGen/arm-arguments.c
U test/CodeGen/sparc-arguments.c
U test/CodeGen/blocks.c
U test/CodeGen/complex-libcalls.c
U test/CodeGen/vectorcall.c
U test/CodeGen/regcall.c
U test/CodeGen/mingw-long-double.c
U include/clang/Basic/DiagnosticSemaKinds.td
U include/clang/Sema/Initialization.h
U include/clang/Format/Format.h
U include/clang/Driver/Options.td
U include/clang/Sema/Sema.h
U include/clang/Basic/BuiltinsX86.def
U unittests/Tooling/CMakeLists.txt
U test/CodeGen/arm-aapcs-vfp.c
U test/CodeGen/ppc64-align-struct.c
U test/CodeGen/complex-builtins.c
U test/CodeGen/aapcs-align.cpp
U test/CodeGen/ppc64le-f128Aggregates.c
U test/CodeGen/wasm-arguments.c
U test/CodeGen/x86_32-arguments-darwin.c
U test/CodeGen/x86_32-arguments-realign.c
A test/CodeGen/x86-enqcmd-builtins.c
U test/CodeGen/regparm-struct.c
U test/CodeGen/x86_32-arguments-linux.c
U test/CodeGen/nvptx-abi.c
U test/CodeGen/x86_32-arguments-iamcu.c
U test/CodeGen/sparcv8-abi.c
U test/CodeGen/ppc64le-aggregates.c
U test/CodeGen/x86_64-arguments.c
U test/CodeGen/renderscript.c
U test/CodeGen/arm-byval-align.c
U test/CodeGen/x86_64-arguments-nacl.c
U test/CodeGen/le32-arguments.c
U test/CodeGen/stdcall-fastcall.c
U test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
U test/CodeGenOpenCL/cl20-device-side-enqueue.cl
U test/CodeGenOpenCL/addr-space-struct-arg.cl
U test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
A test/Sema/attr-nothrow.c
U test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
U test/CodeGenCXX/amdgcn-func-arg.cpp
U test/CodeGenCXX/x86_64-arguments.cpp
U test/CodeGenCXX/stmtexpr.cpp
A test/SemaOpenCLCXX/address-space-references.cl
U cmake/caches/DistributionExample.cmake
U include/clang/Sema/ParsedAttr.h
U include/clang/AST/Type.h
Updated to revision 362691.
Summary of conflicts:
Skipped paths: 1
-- Could NOT find Z3: Found unsuitable version "0.0.0", but required is at least "4.7.1" (found Z3_LIBRARIES-NOTFOUND)
-- Native target architecture is X86
-- Threads enabled.
-- Doxygen disabled.
-- Go bindings disabled.
-- Could NOT find OCaml (missing: OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH)
-- Could NOT find OCaml (missing: OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH)
-- OCaml bindings disabled.
-- LLVM host triple: x86_64-unknown-linux-gnu
-- LLVM default target triple: x86_64-unknown-linux-gnu
-- Building with -fPIC
-- Constructing LLVMBuild project information
-- Linker detection: GNU ld
-- Targeting AArch64
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-- Targeting ARM
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-- Clang version: 9.0.0
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-- Failed to find LLVM FileCheck
-- git Version: v0.0.0
-- Version: 0.0.0
-- Performing Test HAVE_GNU_POSIX_REGEX -- failed to compile
-- Performing Test HAVE_POSIX_REGEX -- success
-- Performing Test HAVE_STEADY_CLOCK -- success
-- Configuring done
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-- Build files have been written to: /opt/clang_commandline_docs/build/llvm
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