[www-scripts] Clang Attribute Doc Update: SUCCESS
LLVM via www-scripts
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Fri Aug 2 03:05:50 PDT 2019
UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
U unittests/Analysis/BasicAliasAnalysisTest.cpp
U unittests/ADT/TripleTest.cpp
U unittests/IR/FunctionTest.cpp
U unittests/Transforms/Scalar/LoopPassManagerTest.cpp
U unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
U lib/Passes/PassBuilder.cpp
U lib/Transforms/InstCombine/InstCombineAddSub.cpp
U lib/Transforms/InstCombine/InstCombineSelect.cpp
U lib/Transforms/Vectorize/LoopVectorize.cpp
U lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
U lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
U lib/Transforms/Utils/LoopUnrollPeel.cpp
U lib/Transforms/Utils/SimplifyCFG.cpp
U lib/Transforms/Utils/LoopSimplify.cpp
U lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
U lib/Transforms/Instrumentation/ControlHeightReduction.cpp
U lib/Transforms/Scalar/LoopSink.cpp
U lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
U lib/Transforms/Scalar/LoopUnrollPass.cpp
U lib/Transforms/IPO/LowerTypeTests.cpp
U lib/Transforms/IPO/Attributor.cpp
U lib/CodeGen/ShrinkWrap.cpp
U lib/CodeGen/RegisterCoalescer.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/CodeGen/LiveVariables.cpp
U lib/CodeGen/MachineScheduler.cpp
U lib/CodeGen/TargetRegisterInfo.cpp
U lib/CodeGen/DetectDeadLanes.cpp
U lib/CodeGen/MachineTraceMetrics.cpp
U lib/CodeGen/RegAllocPBQP.cpp
U lib/CodeGen/LiveRegUnits.cpp
U lib/CodeGen/TargetInstrInfo.cpp
U lib/CodeGen/RegAllocBase.cpp
U lib/CodeGen/MachineRegisterInfo.cpp
U lib/CodeGen/LiveIntervals.cpp
U lib/CodeGen/RegisterScavenging.cpp
U lib/CodeGen/DeadMachineInstructionElim.cpp
U lib/CodeGen/GlobalISel/RegBankSelect.cpp
U lib/CodeGen/GlobalISel/LegalizerHelper.cpp
U lib/CodeGen/GlobalISel/InstructionSelect.cpp
U lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
U lib/CodeGen/GlobalISel/Utils.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/RegAllocFast.cpp
U lib/CodeGen/MachineOperand.cpp
U lib/CodeGen/LiveRangeEdit.cpp
U lib/CodeGen/MachineCombiner.cpp
U lib/CodeGen/LiveDebugVariables.cpp
U lib/CodeGen/InlineSpiller.cpp
U lib/CodeGen/MachineCSE.cpp
U lib/CodeGen/PHIElimination.cpp
U lib/CodeGen/RegisterPressure.cpp
U lib/CodeGen/LiveRangeCalc.cpp
U lib/CodeGen/StackSlotColoring.cpp
U lib/CodeGen/BranchFolding.cpp
U lib/CodeGen/AsmPrinter/DwarfExpression.cpp
U lib/CodeGen/MIRCanonicalizerPass.cpp
U lib/CodeGen/LiveDebugValues.cpp
U lib/CodeGen/MIRPrinter.cpp
U lib/CodeGen/MachinePipeliner.cpp
U lib/CodeGen/MIRParser/MIRParser.cpp
U lib/Analysis/VectorUtils.cpp
U lib/Target/AMDGPU/SIFixSGPRCopies.cpp
U lib/Target/AMDGPU/GCNNSAReassign.cpp
U lib/Target/AMDGPU/GCNRegPressure.h
U lib/Target/AMDGPU/R600ISelLowering.cpp
U lib/Target/AMDGPU/SIMachineScheduler.cpp
U lib/Target/AMDGPU/SIRegisterInfo.h
U lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
U lib/Target/AMDGPU/R600InstrInfo.cpp
U lib/Target/AMDGPU/SIRegisterInfo.cpp
U lib/CodeGen/OptimizePHIs.cpp
U lib/CodeGen/LiveStacks.cpp
U lib/CodeGen/TailDuplicator.cpp
U lib/CodeGen/CalcSpillWeights.cpp
U lib/CodeGen/ProcessImplicitDefs.cpp
U lib/CodeGen/RenameIndependentSubregs.cpp
U lib/CodeGen/EarlyIfConversion.cpp
U lib/CodeGen/LiveInterval.cpp
U lib/CodeGen/AsmPrinter/DwarfDebug.cpp
U lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
U lib/CodeGen/MachineBasicBlock.cpp
U lib/CodeGen/StackMaps.cpp
U lib/CodeGen/TwoAddressInstructionPass.cpp
U lib/CodeGen/MachineInstrBundle.cpp
U lib/CodeGen/CodeGenPrepare.cpp
U lib/Analysis/LoopAccessAnalysis.cpp
U lib/Target/AMDGPU/GCNRegPressure.cpp
U lib/Target/AMDGPU/SIFixupVectorISel.cpp
U lib/Target/AMDGPU/SIPeepholeSDWA.cpp
U lib/Target/AMDGPU/SIShrinkInstructions.cpp
U lib/Target/AMDGPU/R600MachineScheduler.cpp
U lib/Target/AMDGPU/SOPInstructions.td
U lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
U lib/CodeGen/MachineInstr.cpp
U lib/CodeGen/MachineLICM.cpp
U lib/CodeGen/RegAllocGreedy.cpp
U lib/CodeGen/PeepholeOptimizer.cpp
U lib/CodeGen/ExpandPostRAPseudos.cpp
U lib/CodeGen/LiveRangeShrink.cpp
U lib/CodeGen/MachineCopyPropagation.cpp
U lib/CodeGen/VirtRegMap.cpp
U lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
U lib/CodeGen/LivePhysRegs.cpp
U lib/CodeGen/MachineSink.cpp
U lib/CodeGen/ScheduleDAGInstrs.cpp
U lib/CodeGen/MIRParser/MIParser.cpp
U lib/IR/Value.cpp
U lib/Analysis/MemorySSAUpdater.cpp
U lib/Target/AMDGPU/SIISelLowering.cpp
U lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
U lib/Target/AMDGPU/SILowerControlFlow.cpp
U lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
U lib/Target/AMDGPU/SILowerI1Copies.cpp
U lib/Target/AMDGPU/SIFoldOperands.cpp
U lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
U lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
U lib/Target/AMDGPU/SIWholeQuadMode.cpp
U lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
U lib/Target/AMDGPU/SIInstrInfo.cpp
U lib/Target/WebAssembly/WebAssemblyUtilities.cpp
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
U lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
U lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
U lib/Target/SystemZ/SystemZInstrInfo.cpp
U lib/Target/PowerPC/PPCReduceCRLogicals.cpp
U lib/Target/PowerPC/PPCRegisterInfo.cpp
U lib/Target/ARM/ARMCallLowering.cpp
U lib/Target/ARM/ARMInstructionSelector.cpp
U lib/Target/ARM/MLxExpansionPass.cpp
U lib/Target/ARM/ARMAsmPrinter.cpp
U lib/Target/X86/X86OptimizeLEAs.cpp
U lib/Target/AMDGPU/GCNRegBankReassign.cpp
U lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
U lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
U lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
U lib/Target/SystemZ/SystemZRegisterInfo.cpp
U lib/Target/PowerPC/PPCMIPeephole.cpp
U lib/Target/PowerPC/PPCVSXCopy.cpp
U lib/Target/NVPTX/NVPTXAsmPrinter.cpp
U lib/Target/ARM/A15SDOptimizer.cpp
U lib/Target/ARM/ARMScheduleA9.td
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/X86/X86CallFrameOptimization.cpp
U lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
U lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
U lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
U lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
U lib/Target/PowerPC/PPCBranchCoalescing.cpp
U lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
U lib/Target/NVPTX/NVPTXPeephole.cpp
U lib/Target/ARM/ARMParallelDSP.cpp
U lib/Target/ARM/Thumb2InstrInfo.cpp
U lib/Target/ARM/ARMISelLowering.cpp
U lib/Target/Lanai/LanaiInstrInfo.cpp
U lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
U lib/Target/AMDGPU/SIFormMemoryClauses.cpp
U lib/Target/AMDGPU/R600RegisterInfo.cpp
U lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
U lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
U lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
U lib/Target/PowerPC/PPCVSXFMAMutate.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCInstrInfo.cpp
U lib/Target/ARM/Thumb1InstrInfo.cpp
U lib/Target/ARM/ARMInstrMVE.td
U lib/Target/ARM/ThumbRegisterInfo.cpp
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86FlagsCopyLowering.cpp
U lib/Target/X86/X86SpeculativeLoadHardening.cpp
U lib/Target/RISCV/RISCVInstrInfoA.td
U lib/Target/AArch64/AArch64RegisterBankInfo.cpp
U lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
U lib/Target/Hexagon/HexagonBitSimplify.cpp
U lib/Target/Hexagon/HexagonCopyToCombine.cpp
U lib/Target/Hexagon/HexagonHardwareLoops.cpp
U lib/Target/Hexagon/HexagonConstPropagation.cpp
U lib/Target/Hexagon/RDFRegisters.cpp
U lib/Target/X86/X86DomainReassignment.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
U lib/Target/AArch64/AArch64CondBrTuning.cpp
U lib/Target/AArch64/AArch64InstructionSelector.cpp
U lib/Target/Hexagon/HexagonBlockRanges.cpp
U lib/Target/Hexagon/HexagonConstExtenders.cpp
U lib/Target/Hexagon/RDFLiveness.cpp
U lib/Target/Hexagon/HexagonBitTracker.cpp
U lib/Target/Hexagon/HexagonSplitDouble.cpp
U lib/Target/Hexagon/HexagonFrameLowering.cpp
U lib/Target/X86/X86CmovConversion.cpp
U lib/Target/X86/X86InstructionSelector.cpp
U lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
U lib/Target/AArch64/AArch64InstrInfo.cpp
U lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
U lib/Target/AArch64/AArch64AsmPrinter.cpp
U lib/Target/Hexagon/RDFRegisters.h
U lib/Target/Hexagon/HexagonExpandCondsets.cpp
U lib/Target/Hexagon/HexagonGenPredicate.cpp
U lib/Target/Hexagon/RDFGraph.cpp
U lib/Target/Hexagon/HexagonSubtarget.cpp
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
U lib/Target/AArch64/AArch64FrameLowering.cpp
U lib/Target/AArch64/AArch64ConditionalCompares.cpp
U lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
U lib/Target/Hexagon/RDFCopy.cpp
U lib/Target/Hexagon/HexagonEarlyIfConv.cpp
U lib/Target/Hexagon/BitTracker.cpp
U lib/Target/Hexagon/HexagonNewValueJump.cpp
U lib/Target/Hexagon/HexagonGenInsert.cpp
U lib/Target/Hexagon/HexagonPeephole.cpp
U lib/Target/Mips/AsmParser/MipsAsmParser.cpp
U lib/Target/Mips/Mips16InstrInfo.cpp
A test/Transforms/LoopUnroll/peel-loop-conditions-pgo-2.ll
A test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
U test/Transforms/Reassociate/looptest.ll
U test/Transforms/Reassociate/fast-fp-commute.ll
U test/Transforms/Reassociate/2002-05-15-MissedTree.ll
U test/Transforms/Reassociate/optional-flags.ll
U test/Transforms/LoadStoreVectorizer/AMDGPU/vect-ptr-ptr-size-mismatch.ll
U lib/Target/BPF/BPFMIPeephole.cpp
U lib/Target/Mips/MipsRegisterBankInfo.cpp
U test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll
A test/Transforms/LoopVectorize/X86/interleaved-accesses-waw-dependency.ll
U test/Transforms/Reassociate/commute.ll
U test/Transforms/Reassociate/vaarg_movable.ll
U test/Transforms/Reassociate/multistep.ll
U test/Transforms/Reassociate/propagate-flags.ll
A test/Transforms/SimplifyCFG/invalidate-dom.ll
U lib/Target/Hexagon/HexagonInstrInfo.cpp
U lib/Target/Mips/MipsInstructionSelector.cpp
U test/Transforms/LoopUnroll/peel-loop-conditions.ll
U test/Transforms/Reassociate/wrap-flags.ll
U test/Transforms/Reassociate/xor_reassoc.ll
U test/Transforms/Reassociate/mixed-fast-nonfast-fp.ll
U test/Transforms/Reassociate/canonicalize-neg-const.ll
U test/Transforms/Reassociate/shift-factor.ll
A test/MC/WebAssembly/type-index.s
A test/MC/RISCV/rv64a-aliases-valid.s
U test/CodeGen/WebAssembly/reg-stackify.ll
U test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
U test/MC/WebAssembly/tail-call-encodings.s
A test/MC/RISCV/rva-aliases-invalid.s
U test/MC/Mips/mips64-expansions.s
U test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
U test/Transforms/InstCombine/select.ll
A test/MC/RISCV/rva-aliases-valid.s
U test/MC/RISCV/rv32a-invalid.s
U test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
U test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
U lib/Target/BPF/BPFISelDAGToDAG.cpp
U lib/Target/Mips/MipsOptimizePICCall.cpp
A test/tools/llvm-objdump/X86/macho-data-in-code.ll
U test/CodeGen/ARM/bswap16.ll
A test/Other/new-pm-pgo-O0.ll
A test/Transforms/LoopUnroll/peel-loop-conditions-pgo-1.ll
U test/Transforms/Reassociate/fast-SubReassociate.ll
U test/Transforms/Reassociate/no-op.ll
U test/Transforms/Reassociate/fast-multistep.ll
U test/Transforms/Reassociate/2002-05-15-SubReassociate.ll
U test/Transforms/Reassociate/mulfactor.ll
U test/MC/WebAssembly/basic-assembly.s
U test/MC/RISCV/rv64a-invalid.s
U test/MC/Mips/mips-expansions.s
U test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
U test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
U test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
U utils/lit/tests/shtest-run-at-line.py
U test/CodeGen/X86/vector-mul.ll
U test/CodeGen/X86/shift-combine.ll
U test/CodeGen/AArch64/shift-mod.ll
U include/llvm/Analysis/TargetTransformInfo.h
U include/llvm/CodeGen/VirtRegMap.h
U include/llvm/CodeGen/TargetLowering.h
U include/llvm/CodeGen/TargetRegisterInfo.h
U include/llvm/Transforms/Scalar/LoopUnrollPass.h
U test/CodeGen/X86/min-legal-vector-width.ll
U test/CodeGen/MIR/PowerPC/peephole-miscompile-extswsli.mir
U include/llvm/Analysis/AliasAnalysis.h
U include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
U include/llvm/CodeGen/MachineRegisterInfo.h
U include/llvm/CodeGen/RegisterPressure.h
U include/llvm/Transforms/Utils/UnrollLoop.h
U test/CodeGen/X86/vec_umulo.ll
U test/CodeGen/X86/vec_smulo.ll
U test/CodeGen/Thumb2/mve-shuffle.ll
U include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
U include/llvm/CodeGen/Register.h
U include/llvm/CodeGen/LiveRegUnits.h
U include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
A include/llvm/MC/MCRegister.h
U test/CodeGen/X86/promote-vec3.ll
U test/CodeGen/X86/merge-consecutive-loads-256.ll
A test/CodeGen/AArch64/extra-callee-save.mir
U include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
U include/llvm/CodeGen/RegisterClassInfo.h
U include/llvm/CodeGen/ScheduleDAGInstrs.h
U include/llvm/CodeGen/MachineInstrBuilder.h
U include/llvm/Passes/PassBuilder.h
U include/llvm/IR/Value.h
U docs/CMake.rst
U include/llvm/IR/Function.h
U docs/CodeGenerator.rst
U tools/dsymutil/dsymutil.cpp
U include/llvm/IR/IntrinsicsAMDGPU.td
U include/llvm/Support/Alignment.h
U include/llvm/IR/Instructions.h
U include/llvm/Support/type_traits.h
U include/llvm/Support/Compiler.h
U tools/llvm-objdump/MachODump.cpp
U utils/lit/tests/lit.cfg
Updated to revision 367668.
UPDATING /opt/clang_commandline_docs//src/llvm/llvm/tools/clang CLANG SOURCES
Updating '.':
Skipped 'docs/ClangCommandLineReference.rst' -- Node remains in conflict
D test/Analysis/structured_bindings.cc
D test/CodeGen/ppc-vector-compare.cc
A test/CodeGen/ppc-vector-compare.cpp
U unittests/Tooling/RefactoringTest.cpp
U unittests/Tooling/RewriterTestContext.h
U unittests/Basic/FileManagerTest.cpp
U unittests/DirectoryWatcher/DirectoryWatcherTest.cpp
U unittests/Lex/HeaderSearchTest.cpp
U unittests/Lex/PPCallbacksTest.cpp
U unittests/Format/FormatTest.cpp
U lib/Driver/ToolChains/FreeBSD.cpp
U lib/Driver/ToolChains/Gnu.cpp
U lib/StaticAnalyzer/Core/CallEvent.cpp
U lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
U lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
U lib/CodeGen/BackendUtil.cpp
U lib/CodeGen/CodeGenAction.cpp
U lib/CodeGen/CGOpenMPRuntime.cpp
U lib/Parse/ParseDeclCXX.cpp
U lib/Parse/Parser.cpp
U lib/Parse/ParseDecl.cpp
U lib/Tooling/Refactoring.cpp
U lib/Tooling/Core/Replacement.cpp
U lib/Serialization/ModuleManager.cpp
U lib/Serialization/GlobalModuleIndex.cpp
U lib/Serialization/ASTReader.cpp
U lib/ARCMigrate/FileRemapper.cpp
U lib/ARCMigrate/ObjCMT.cpp
U lib/Frontend/TextDiagnostic.cpp
U lib/Frontend/Rewrite/FrontendActions.cpp
U lib/Frontend/InitHeaderSearch.cpp
U lib/Frontend/PrecompiledPreamble.cpp
U lib/Frontend/ASTUnit.cpp
U lib/Frontend/CompilerInstance.cpp
U lib/Frontend/FrontendAction.cpp
U lib/Basic/TokenKinds.cpp
U lib/Basic/Module.cpp
U lib/Basic/SourceManager.cpp
U lib/Basic/Targets.cpp
U lib/Basic/FileManager.cpp
U lib/DirectoryWatcher/mac/DirectoryWatcher-mac.cpp
U lib/Analysis/AnalysisDeclContext.cpp
U lib/Sema/SemaDeclCXX.cpp
U lib/AST/ASTImporter.cpp
U lib/Lex/PPDirectives.cpp
U lib/Lex/HeaderSearch.cpp
U lib/Lex/ModuleMap.cpp
U lib/Lex/PPLexerChange.cpp
U lib/Lex/HeaderMap.cpp
U lib/Format/Format.cpp
U test/Analysis/loop-block-counts.c
U test/Analysis/loop-unrolling.cpp
A test/Analysis/structured_bindings.cpp
A test/Analysis/stack-frame-context-revision.cpp
U test/CodeGenCXX/dllexport.cpp
U test/OpenMP/nvptx_target_requires_unified_shared_memory.cpp
U test/OpenMP/declare_target_link_codegen.cpp
U test/OpenMP/declare_target_codegen.cpp
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/gcc
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/gcc/riscv64-suse-linux
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/gcc/riscv64-suse-linux/9
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/gcc/riscv64-suse-linux/9/crtbegin.o
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/gcc/riscv64-suse-linux/9/crtend.o
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/crti.o
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/crtn.o
A test/Driver/Inputs/opensuse_tumbleweed_riscv64_tree/usr/lib64/crt1.o
U test/Driver/fuse-ld.c
U test/Profile/gcc-flag-compatibility.c
U include/clang/Basic/TokenKinds.def
U include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
U tools/libclang/CIndex.cpp
U tools/clang-refactor/TestSupport.cpp
A test/Profile/Inputs/gcc-flag-compatibility_IR.proftext
U include/clang/Basic/FileManager.h
U test/Driver/freebsd.c
U tools/clang-rename/ClangRename.cpp
U tools/clang-format/ClangFormat.cpp
U tools/clang-refactor/ClangRefactor.cpp
U test/Driver/linux-ld.c
U include/clang/Basic/TokenKinds.h
U include/clang/Analysis/AnalysisDeclContext.h
U include/clang/Parse/Parser.h
U tools/clang-import-test/clang-import-test.cpp
U tools/libclang/Indexing.cpp
Updated to revision 367668.
Summary of conflicts:
Skipped paths: 1
-- Could NOT find Z3: Found unsuitable version "0.0.0", but required is at least "4.7.1" (found Z3_LIBRARIES-NOTFOUND)
-- Native target architecture is X86
-- Threads enabled.
-- Doxygen disabled.
-- Go bindings disabled.
-- Could NOT find OCaml (missing: OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH)
-- Could NOT find OCaml (missing: OCAMLFIND OCAML_VERSION OCAML_STDLIB_PATH)
-- OCaml bindings disabled.
-- LLVM host triple: x86_64-unknown-linux-gnu
-- LLVM default target triple: x86_64-unknown-linux-gnu
-- Building with -fPIC
-- Constructing LLVMBuild project information
-- Linker detection: GNU ld
-- Targeting AArch64
-- Targeting AMDGPU
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