[www-scripts] Clang Attribute Doc Update: SUCCESS

LLVM via www-scripts www-scripts at lists.llvm.org
Thu Jan 11 03:04:16 PST 2018


UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
U    docs/MIRLangRef.rst
U    lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
U    lib/Transforms/Utils/SimplifyLibCalls.cpp
U    lib/Transforms/Utils/BuildLibCalls.cpp
U    lib/Transforms/Utils/SimplifyCFG.cpp
U    lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
U    lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
U    lib/CodeGen/TargetLoweringBase.cpp
U    lib/CodeGen/LiveRangeEdit.cpp
U    lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAG.cpp
U    lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
U    lib/IR/ValueTypes.cpp
U    lib/Analysis/InlineCost.cpp
U    lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
U    lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
U    lib/Target/AMDGPU/SIRegisterInfo.td
U    lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
U    lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
U    lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
U    lib/Target/AMDGPU/SIRegisterInfo.cpp
U    lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
U    lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
U    lib/Target/ARM/ARMRegisterBankInfo.cpp
U    lib/Target/X86/X86InstrAVX512.td
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86.td
U    lib/Target/X86/AsmParser/X86Operand.h
U    lib/Target/X86/X86ISelDAGToDAG.cpp
U    lib/Target/X86/X86Subtarget.cpp
U    lib/Target/X86/X86Subtarget.h
U    lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
U    lib/Target/X86/X86ISelLowering.h
U    lib/Target/RISCV/RISCVFrameLowering.cpp
U    lib/Target/RISCV/RISCVRegisterInfo.h
U    lib/Target/RISCV/RISCVISelLowering.h
U    lib/Target/RISCV/RISCVInstrInfo.cpp
U    lib/Target/RISCV/RISCVTargetMachine.cpp
A    lib/Target/RISCV/RISCVMachineFunctionInfo.h
U    lib/Target/RISCV/RISCVRegisterInfo.cpp
U    lib/Target/RISCV/RISCVISelLowering.cpp
U    lib/Target/RISCV/RISCVMCInstLower.cpp
U    lib/Target/RISCV/RISCVInstrInfo.h
U    lib/Target/RISCV/RISCVAsmPrinter.cpp
U    lib/Target/RISCV/RISCVISelDAGToDAG.cpp
U    lib/Target/AArch64/AArch64InstrInfo.cpp
U    lib/Target/AArch64/AArch64SVEInstrInfo.td
U    lib/Target/AArch64/SVEInstrFormats.td
U    test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
U    test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
U    test/CodeGen/ARM/GlobalISel/arm-instruction-select-combos.mir
A    test/CodeGen/X86/combine-fabs.ll
U    test/CodeGen/X86/vector-shuffle-128-v2.ll
A    test/CodeGen/RISCV/vararg.ll
A    test/CodeGen/RISCV/inline-asm.ll
U    test/CodeGen/X86/darwin-bzero.ll
A    test/CodeGen/X86/trunc-subvector.ll
U    test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
A    test/CodeGen/RISCV/large-stack.ll
U    test/CodeGen/RISCV/select-cc.ll
A    test/Transforms/InstCombine/fdiv-cos-sin.ll
U    test/Transforms/Inline/byval.ll
U    test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
U    test/MC/Disassembler/AMDGPU/sop1_vi.txt
A    test/MC/AArch64/SVE/dup.s
U    test/MC/AArch64/SVE/sub-diagnostics.s
A    test/DebugInfo/COFF/types-cvarargs.ll
U    include/llvm/CodeGen/DwarfStringPoolEntry.h
U    include/llvm/ExecutionEngine/Orc/Core.h
A    test/CodeGen/RISCV/frameaddr-returnaddr.ll
A    test/CodeGen/RISCV/branch-relaxation.ll
U    test/CodeGen/AArch64/machine-outliner.mir
U    test/Transforms/InstCombine/bswap.ll
A    test/Transforms/SLPVectorizer/X86/sign-extend.ll
A    test/MC/AMDGPU/xnack-mask.s
U    test/MC/X86/x86_64-asm-match.s
A    test/MC/AArch64/SVE/dup-diagnostics.s
A    test/MC/AArch64/SVE/mov-diagnostics.s
U    include/llvm/CodeGen/LiveRangeEdit.h
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    include/llvm/ADT/SmallVector.h
U    test/CodeGen/X86/vector-shuffle-mmx.ll
U    test/CodeGen/X86/masked_gather_scatter.ll
U    test/CodeGen/RISCV/jumptable.ll
U    test/CodeGen/RISCV/branch.ll
A    test/CodeGen/RISCV/analyze-branch.ll
U    test/CodeGen/AArch64/minmax-of-minmax.ll
A    test/Transforms/InstCombine/fdiv-sin-cos.ll
U    test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
A    test/MC/Mips/unsupported-relocation.s
U    test/MC/Disassembler/AMDGPU/vop3_gfx9.txt
U    test/MC/AArch64/SVE/add-diagnostics.s
A    test/MC/AArch64/SVE/mov.s
U    include/llvm/CodeGen/AsmPrinter.h
U    include/llvm/Transforms/Utils/BuildLibCalls.h
Updated to revision 322268.
UPDATING /opt/clang_commandline_docs//src/llvm/llvm/tools/clang CLANG SOURCES
Updating '.':
U    test/CodeGenCXX/sanitize-no-dtor-callback.cpp
U    test/CodeGenCXX/cxx1z-inline-variables.cpp
U    test/SemaTemplate/cxx17-inline-variables.cpp
U    test/Driver/unknown-arg.c
U    test/Driver/fsanitize.c
U    test/Sema/builtins-x86.c
U    cmake/caches/Fuchsia-stage2.cmake
U    include/clang/Basic/BuiltinsX86.def
U    include/clang/Driver/SanitizerArgs.h
U    unittests/Lex/LexerTest.cpp
U    lib/Basic/Targets/X86.cpp
U    lib/Sema/SemaTemplateInstantiateDecl.cpp
U    lib/Sema/SemaChecking.cpp
U    lib/Lex/ScratchBuffer.cpp
Updated to revision 322268.
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-- LLVM host triple: x86_64-unknown-linux-gnu
-- LLVM default target triple: x86_64-unknown-linux-gnu
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