[www-scripts] Clang Attribute Doc Update: SUCCESS
LLVM via www-scripts
www-scripts at lists.llvm.org
Thu Feb 1 03:01:54 PST 2018
UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
D test/Transforms/InstCombine/pr33765.ll
D test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll
A test/Analysis/Lint/memintrin.ll
U test/tools/llvm-cov/showLineExecutionCounts.cpp
U test/tools/llvm-cov/hideUnexecutedSubviews.test
U test/tools/llvm-cov/style.test
U test/DebugInfo/X86/dbg-addr-dse.ll
U test/DebugInfo/X86/pieces-4.ll
U test/DebugInfo/X86/op_deref.ll
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U test/DebugInfo/X86/spill-nontrivial-param.ll
U test/DebugInfo/X86/pr34545.ll
U test/DebugInfo/X86/dbg-addr.ll
U test/DebugInfo/X86/bbjoin.ll
U test/DebugInfo/X86/spill-indirect-nrvo.ll
U test/DebugInfo/X86/sdagsplit-1.ll
U test/DebugInfo/X86/debug-loc-asan.ll
U test/DebugInfo/X86/dbg-value-frame-index.ll
U test/DebugInfo/X86/vla.ll
U test/DebugInfo/X86/dbg-value-dag-combine.ll
U test/DebugInfo/X86/live-debug-values.ll
U test/DebugInfo/X86/sdag-combine.ll
U test/DebugInfo/X86/sdag-split-arg.ll
U test/DebugInfo/X86/dbg-value-transfer-order.ll
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U test/CodeGen/X86/GlobalISel/select-fpext-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir
U test/CodeGen/X86/GlobalISel/legalize-mul-v512.mir
U test/CodeGen/X86/GlobalISel/select-insert-vec512.mir
U test/CodeGen/X86/GlobalISel/gep.ll
U test/CodeGen/X86/GlobalISel/legalize-fadd-scalar.mir
U test/CodeGen/X86/GlobalISel/select-add.mir
U test/CodeGen/X86/GlobalISel/add-scalar.ll
U test/CodeGen/X86/GlobalISel/select-fadd-scalar.mir
U test/CodeGen/X86/GlobalISel/select-and-scalar.mir
U test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir
U test/CodeGen/X86/GlobalISel/legalize-fsub-scalar.mir
U test/CodeGen/X86/GlobalISel/select-sub-v128.mir
U test/CodeGen/X86/branchfolding-undef.mir
U test/CodeGen/X86/avx512dq-intrinsics.ll
U test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
U test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
U test/CodeGen/X86/GlobalISel/select-extract-vec256.mir
U test/CodeGen/X86/GlobalISel/select-blsi.mir
U test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
U test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
U test/CodeGen/X86/GlobalISel/legalize-fpext-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-ext.mir
U test/CodeGen/X86/GlobalISel/select-add-v512.mir
U test/CodeGen/X86/avx-cmp.ll
U test/CodeGen/X86/3addr-or.ll
U test/CodeGen/X86/atomic-eflags-reuse.ll
U test/CodeGen/X86/GlobalISel/select-GV.mir
U test/CodeGen/X86/GlobalISel/regbankselect-AVX512.mir
U test/CodeGen/X86/GlobalISel/legalize-insert-vec256.mir
U test/CodeGen/X86/GlobalISel/select-leaf-constant.mir
U test/CodeGen/X86/GlobalISel/select-blsr.mir
U test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
U test/CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
U test/CodeGen/X86/GlobalISel/legalize-fmul-scalar.mir
U test/CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir
U test/CodeGen/X86/GlobalISel/select-ext.mir
U test/CodeGen/X86/GlobalISel/legalize-sub.mir
U test/CodeGen/X86/GlobalISel/select-memop-v512.mir
U test/CodeGen/X86/GlobalISel/x86-legalize-GV.mir
U test/CodeGen/X86/GlobalISel/select-or-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-add-v512.mir
U test/CodeGen/X86/GlobalISel/legalize-sub-v128.mir
U test/CodeGen/X86/GlobalISel/legalize-fdiv-scalar.mir
U test/CodeGen/X86/GlobalISel/select-gep.mir
U test/CodeGen/X86/GlobalISel/select-cmp.mir
U test/CodeGen/X86/GlobalISel/legalize-brcond.mir
U test/CodeGen/X86/GlobalISel/legalize-cmp.mir
U test/CodeGen/X86/GlobalISel/select-mul-scalar.mir
U test/CodeGen/X86/GlobalISel/select-fmul-scalar.mir
U test/CodeGen/X86/GlobalISel/select-mul-vec.mir
U test/CodeGen/X86/GlobalISel/ext-x86-64.ll
U test/CodeGen/X86/GlobalISel/legalize-insert-vec512.mir
U test/CodeGen/X86/GlobalISel/select-constant.mir
U test/CodeGen/X86/GlobalISel/select-trunc.mir
U test/CodeGen/X86/GlobalISel/select-add-x32.mir
U test/CodeGen/X86/GlobalISel/legalize-constant.mir
U test/CodeGen/X86/GlobalISel/legalize-mul-v256.mir
U test/CodeGen/X86/GlobalISel/select-insert-vec256.mir
U test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
U test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
U test/CodeGen/X86/GlobalISel/select-fdiv-scalar.mir
U test/CodeGen/X86/GlobalISel/select-undef.mir
U test/CodeGen/X86/GlobalISel/legalize-sub-v256.mir
U test/CodeGen/X86/GlobalISel/select-inc.mir
U test/CodeGen/X86/GlobalISel/select-xor-scalar.mir
U test/CodeGen/X86/GlobalISel/select-phi.mir
U test/CodeGen/X86/GlobalISel/select-add-v256.mir
U test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
U test/CodeGen/X86/GlobalISel/select-fsub-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-mul-v128.mir
U test/CodeGen/X86/GlobalISel/regbankselect-AVX2.mir
U test/CodeGen/X86/GlobalISel/select-extract-vec512.mir
U test/CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir
U test/CodeGen/X86/GlobalISel/select-sub-v256.mir
U test/CodeGen/X86/GlobalISel/legalize-phi.mir
U test/CodeGen/X86/GlobalISel/legalize-add-v128.mir
U test/CodeGen/X86/GlobalISel/select-brcond.mir
U test/CodeGen/X86/GlobalISel/select-copy.mir
U test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
U test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
U test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir
U test/CodeGen/X86/GlobalISel/select-add-v128.mir
U test/CodeGen/X86/GlobalISel/select-sub.mir
U test/CodeGen/X86/GlobalISel/select-fconstant.mir
U test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
U test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
U test/CodeGen/X86/GlobalISel/select-memop-v128.mir
U test/CodeGen/X86/GlobalISel/select-memop-scalar.mir
U test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
U test/CodeGen/X86/vector-trunc.ll
U test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
U test/CodeGen/X86/select_const.ll
U test/CodeGen/X86/vector-bitreverse.ll
U test/CodeGen/X86/update-terminator.mir
U test/CodeGen/X86/avx512-trunc.ll
U test/CodeGen/X86/2006-11-17-IllegalMove.ll
U test/CodeGen/X86/avx-vinsertf128.ll
U test/CodeGen/X86/GlobalISel/legalize-add-v256.mir
U test/CodeGen/X86/shift-combine.ll
U test/CodeGen/X86/popcnt.ll
U test/CodeGen/X86/urem-power-of-two.ll
U test/CodeGen/X86/pr34653.ll
U test/CodeGen/X86/vec_cmp_uint-128.ll
U test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
U test/CodeGen/X86/avx512-hadd-hsub.ll
U test/CodeGen/MIR/ARM/cfi-same-value.mir
U test/CodeGen/X86/GlobalISel/ext.ll
U test/CodeGen/X86/vector-trunc-math.ll
U test/CodeGen/X86/mul-constant-result.ll
U test/CodeGen/X86/2010-05-28-Crash.ll
U test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir
U test/CodeGen/MIR/X86/metadata-operands.mir
U test/CodeGen/MIR/X86/successor-basic-blocks.mir
U test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
U test/CodeGen/MIR/X86/tied-physical-regs-match.mir
U test/CodeGen/X86/GlobalISel/legalize-add.mir
U test/CodeGen/X86/vector-lzcnt-256.ll
U test/CodeGen/X86/sar_fold64.ll
U test/CodeGen/X86/machine-cse.ll
U test/CodeGen/X86/ipra-reg-alias.ll
U test/CodeGen/X86/add.ll
U test/CodeGen/X86/divrem.ll
U test/CodeGen/X86/avx512-insert-extract.ll
U test/CodeGen/MIR/ARM/bundled-instructions.mir
U test/CodeGen/MIR/X86/named-registers.mir
U test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir
U test/CodeGen/MIR/X86/callee-saved-info.mir
U test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
U test/CodeGen/MIR/X86/undef-register-flag.mir
U test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
U test/CodeGen/MIR/X86/missing-closing-quote.mir
U test/CodeGen/MIR/X86/unknown-subregister-index-op.mir
U test/CodeGen/MIR/X86/dead-register-flag.mir
U test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
U test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
U test/CodeGen/MIR/X86/standalone-register-error.mir
U test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
U test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
U test/CodeGen/MIR/X86/roundtrip.mir
U test/CodeGen/MIR/X86/undefined-jump-table-id.mir
U test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
U test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
U test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
U test/CodeGen/MIR/X86/machine-basic-block-operands.mir
U test/CodeGen/MIR/X86/fixed-stack-objects.mir
U test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir
U test/CodeGen/MIR/X86/expected-subregister-after-colon.mir
U test/CodeGen/MIR/X86/undefined-stack-object.mir
U test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir
U test/CodeGen/MIR/X86/expected-machine-operand.mir
U test/CodeGen/MIR/X86/large-immediate-operand-error.mir
U test/CodeGen/MIR/X86/basic-block-liveins.mir
U test/CodeGen/MIR/X86/tied-def-operand-invalid.mir
U test/CodeGen/MIR/X86/unexpected-type-phys.mir
U test/CodeGen/MIR/X86/subregister-index-operands.mir
U test/CodeGen/MIR/X86/liveout-register-mask.mir
U test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
U test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
U test/CodeGen/MIR/X86/external-symbol-operands.mir
U test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir
U test/CodeGen/MIR/X86/memory-operands.mir
U test/CodeGen/MIR/X86/virtual-registers.mir
U test/CodeGen/MIR/X86/expected-number-after-bb.mir
U test/CodeGen/MIR/X86/newline-handling.mir
U test/CodeGen/MIR/X86/killed-register-flag.mir
U test/CodeGen/MIR/X86/early-clobber-register-flag.mir
U test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
U test/CodeGen/X86/pmul.ll
U test/CodeGen/X86/vector-rotate-128.ll
U test/CodeGen/X86/avx512dqvl-intrinsics.ll
U test/CodeGen/X86/vector-tzcnt-128.ll
U test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir
U test/CodeGen/MIR/ARM/expected-closing-brace.mir
U test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
U test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
U test/CodeGen/MIR/X86/stack-object-operands.mir
U test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
U test/CodeGen/MIR/X86/undefined-named-global-value.mir
U test/CodeGen/MIR/X86/implicit-register-flag.mir
U test/CodeGen/MIR/X86/immediate-operands.mir
U test/CodeGen/MIR/X86/register-operand-class-invalid1.mir
U test/CodeGen/MIR/X86/block-address-operands.mir
U test/CodeGen/MIR/X86/diexpr-win32.mir
U test/CodeGen/MIR/X86/subregister-operands.mir
U test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
U test/CodeGen/MIR/X86/stack-objects.mir
U test/CodeGen/MIR/X86/frame-info-stack-references.mir
U test/CodeGen/MIR/X86/expected-register-after-flags.mir
U test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
U test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
U test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
U test/CodeGen/MIR/X86/auto-successor.mir
U test/CodeGen/MIR/X86/large-offset-number-error.mir
U test/CodeGen/MIR/X86/null-register-operands.mir
U test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir
U test/CodeGen/MIR/X86/expected-stack-object.mir
U test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
U test/CodeGen/MIR/X86/expected-named-register-livein.mir
U test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir
U test/CodeGen/MIR/X86/unknown-subregister-index.mir
U test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir
U test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
U test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
U test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
U test/CodeGen/MIR/X86/duplicate-register-flag-error.mir
U test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
U test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
U test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir
U test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
U test/CodeGen/MIR/X86/missing-implicit-operand.mir
U test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir
U test/CodeGen/MIR/X86/unknown-register.mir
U test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
U test/CodeGen/MIR/X86/machine-instructions.mir
U test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir
U test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
U test/CodeGen/MIR/X86/subreg-on-physreg.mir
U test/CodeGen/MIR/X86/branch-probabilities.mir
U test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
U test/CodeGen/MIR/X86/register-operand-class-invalid0.mir
U test/CodeGen/MIR/X86/jump-table-info.mir
U test/CodeGen/MIR/X86/inline-asm-registers.mir
U test/CodeGen/MIR/X86/def-register-already-tied-error.mir
U test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir
U test/CodeGen/MIR/X86/machine-verifier.mir
U test/CodeGen/MIR/X86/global-value-operands.mir
U test/CodeGen/MIR/X86/invalid-target-flag-name.mir
U test/CodeGen/MIR/X86/undefined-virtual-register.mir
U test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
U test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir
U test/CodeGen/MIR/X86/large-index-number-error.mir
U test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
U test/CodeGen/MIR/X86/instructions-debug-location.mir
U test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
U test/CodeGen/MIR/X86/expected-target-flag-name.mir
U test/CodeGen/MIR/X86/stack-object-redefinition-error.mir
U test/CodeGen/MIR/X86/invalid-constant-pool-item.mir
U test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir
U test/CodeGen/MIR/X86/unknown-metadata-keyword.mir
U test/CodeGen/MIR/X86/jump-table-redefinition-error.mir
U test/CodeGen/MIR/X86/renamable-register-flag.mir
U test/CodeGen/MIR/X86/generic-instr-type.mir
U test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir
U test/CodeGen/MIR/AArch64/generic-virtual-registers-with-regbank-error.mir
U test/CodeGen/MIR/X86/missing-comma.mir
U test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir
U test/CodeGen/MIR/X86/register-mask-operands.mir
U test/CodeGen/MIR/AArch64/addrspace-memoperands.mir
U test/CodeGen/MIR/AArch64/expected-target-flag-name.mir
U test/CodeGen/MIR/X86/constant-pool.mir
U test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir
U test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
U test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir
U test/CodeGen/MIR/AArch64/cfi.mir
U test/CodeGen/MIR/AArch64/register-operand-bank.mir
U test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir
U test/CodeGen/MIR/X86/undefined-global-value.mir
U test/CodeGen/MIR/X86/stack-object-invalid-name.mir
U test/CodeGen/MIR/X86/register-operand-class.mir
U test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
U test/CodeGen/MIR/X86/function-liveins.mir
U test/CodeGen/MIR/X86/unknown-metadata-node.mir
U test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
U test/CodeGen/MIR/X86/cfi-offset.mir
U test/CodeGen/MIR/AArch64/target-memoperands.mir
U test/CodeGen/MIR/AArch64/swp.mir
U test/CodeGen/MIR/AArch64/invalid-target-memoperands.mir
U test/CodeGen/MIR/AArch64/atomic-memoperands.mir
U test/CodeGen/MIR/Mips/memory-operands.mir
U test/CodeGen/MIR/AMDGPU/target-flags.mir
U test/CodeGen/AArch64/live-interval-analysis.mir
U test/CodeGen/AArch64/arm64-csldst-mmo.ll
U test/CodeGen/AArch64/machine-combiner.ll
A test/CodeGen/AArch64/taildup-cfi.ll
U test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir
U test/CodeGen/MIR/AMDGPU/syncscopes.mir
U test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
U test/CodeGen/AArch64/fast-regalloc-empty-bb-with-liveins.mir
U test/CodeGen/AArch64/cfi_restore.mir
U test/CodeGen/AArch64/ldst-opt-zr-clobber.mir
U test/CodeGen/AArch64/GlobalISel/select-insert-extract.mir
U test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
U test/CodeGen/MIR/Hexagon/parse-lane-masks.mir
U test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
U test/CodeGen/AArch64/ldst-opt-aa.mir
U test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
U test/CodeGen/AArch64/machine-zero-copy-remove.mir
U test/CodeGen/AArch64/GlobalISel/select-bswap.mir
U test/CodeGen/MIR/AArch64/target-flags.mir
U test/CodeGen/MIR/AArch64/intrinsics.mir
U test/CodeGen/MIR/Hexagon/target-flags.mir
U test/CodeGen/MIR/AMDGPU/target-index-operands.mir
U test/CodeGen/AArch64/machine-copy-remove.mir
U test/CodeGen/AArch64/arm64-ldst-unscaled-pre-post.mir
U test/CodeGen/AArch64/spill-undef.mir
U test/CodeGen/AArch64/falkor-hwpf-fix.mir
U test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
U test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll
U test/CodeGen/AArch64/GlobalISel/select-int-ext.mir
U test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
U test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
U test/CodeGen/AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir
U test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
U test/CodeGen/AArch64/GlobalISel/vastart.ll
U test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
U test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
U test/CodeGen/AArch64/GlobalISel/translate-gep.ll
U test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
U test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
U test/CodeGen/AArch64/GlobalISel/legalize-or.mir
U test/CodeGen/AArch64/GlobalISel/select-br.mir
U test/CodeGen/AArch64/GlobalISel/machine-cse-mid-pipeline.mir
U test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
U test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
U test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
U test/CodeGen/AArch64/GlobalISel/select-store.mir
U test/CodeGen/AArch64/GlobalISel/select.mir
U test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir
U test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
U test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
U test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
U test/CodeGen/AArch64/GlobalISel/localizer-in-O0-pipeline.mir
U test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
U test/CodeGen/AArch64/GlobalISel/select-binop.mir
U test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
U test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
U test/CodeGen/AArch64/GlobalISel/select-constant.mir
U test/CodeGen/AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir
U test/CodeGen/AArch64/GlobalISel/varargs-ios-translator.ll
U test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir
U test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
U test/CodeGen/AArch64/GlobalISel/select-intrinsic-crypto-aesmc.mir
U test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
U test/CodeGen/AArch64/GlobalISel/select-load.mir
U test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
U test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
U test/CodeGen/AArch64/GlobalISel/debug-insts.ll
U test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
U test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
U test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
U test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
U test/CodeGen/AArch64/GlobalISel/legalize-and.mir
U test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
U test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir
U test/CodeGen/AArch64/GlobalISel/select-pr32733.mir
U test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir
U test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
U test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
U test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir
U test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
U test/CodeGen/AArch64/GlobalISel/select-imm.mir
U test/CodeGen/AArch64/GlobalISel/select-trunc.mir
U test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
U test/CodeGen/AArch64/GlobalISel/select-atomicrmw.mir
U test/CodeGen/AArch64/GlobalISel/select-implicit-def.mir
U test/CodeGen/AArch64/GlobalISel/select-xor.mir
U test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
U test/CodeGen/AArch64/GlobalISel/select-phi.mir
U test/CodeGen/AArch64/GlobalISel/no-regclass.mir
U test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
U test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir
U test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll
U test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
U test/CodeGen/AArch64/GlobalISel/regbankselect-reg_sequence.mir
U test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
U test/CodeGen/AArch64/GlobalISel/localizer.mir
U test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
U test/CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir
U test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-sdiv.mir
U test/CodeGen/AArch64/GlobalISel/select-mul.mir
U test/CodeGen/AArch64/GlobalISel/call-translator.ll
U test/CodeGen/AArch64/GlobalISel/select-muladd.mir
U test/CodeGen/AArch64/GlobalISel/verify-selected.mir
U test/CodeGen/AArch64/GlobalISel/select-cbz.mir
U test/CodeGen/AArch64/GlobalISel/select-bitcast.mir
U test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
U test/CodeGen/AArch64/GlobalISel/legalize-add.mir
U test/CodeGen/AArch64/spill-fold.mir
U test/CodeGen/AArch64/machine-dead-copy.mir
U test/CodeGen/AArch64/loh.mir
U test/CodeGen/AArch64/arm64-regress-opt-cmp.mir
U test/CodeGen/AArch64/machine-combiner.mir
U test/CodeGen/Hexagon/vextract-basic.mir
U test/CodeGen/Hexagon/mux-kill3.mir
U test/CodeGen/AArch64/GlobalISel/legalize-div.mir
U test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
U test/CodeGen/AArch64/machine-sink-zr.mir
U test/CodeGen/AArch64/machine-outliner.mir
U test/CodeGen/AArch64/regcoal-physreg.mir
U test/CodeGen/AArch64/illegal-float-ops.ll
U test/CodeGen/AArch64/ldst-opt.mir
U test/CodeGen/Hexagon/postinc-baseoffset.mir
U test/CodeGen/Hexagon/cext-opt-basic.mir
U test/CodeGen/AArch64/GlobalISel/select-fma.mir
U test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir
U test/CodeGen/AArch64/movimm-wzr.mir
U test/CodeGen/AArch64/phi-dbg.ll
U test/CodeGen/AArch64/reg-scavenge-frame.mir
U test/CodeGen/AArch64/ccmp-successor-probs.mir
U test/CodeGen/Hexagon/post-ra-kill-update.mir
U test/CodeGen/Hexagon/regalloc-liveout-undef.mir
U test/CodeGen/Hexagon/newvaluejump-kill2.mir
U test/CodeGen/Hexagon/newvaluejump-c4.mir
U test/CodeGen/Hexagon/early-if-debug.mir
U test/CodeGen/Hexagon/anti-dep-partial.mir
U test/CodeGen/Hexagon/cext-opt-range-offset.mir
U test/CodeGen/Hexagon/branchfolder-insert-impdef.mir
U test/CodeGen/Hexagon/rdf-copy-renamable-reserved.mir
U test/CodeGen/Hexagon/expand-condsets-def-undef.mir
U test/CodeGen/Hexagon/expand-condsets-imm.mir
U test/CodeGen/Hexagon/packetize-nvj-no-prune.mir
U test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
U test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
U test/CodeGen/AArch64/arm64-misched-multimmo.ll
U test/CodeGen/AArch64/machine-scheduler.mir
U test/CodeGen/AArch64/scheduledag-constreg.mir
U test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
U test/CodeGen/Hexagon/hwloop-redef-imm.mir
U test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
U test/CodeGen/Hexagon/ifcvt-live-subreg.mir
U test/CodeGen/Hexagon/livephysregs-lane-masks2.mir
U test/CodeGen/Hexagon/ifcvt-common-kill.mir
U test/CodeGen/Hexagon/newvaluejump-solo.mir
U test/CodeGen/Hexagon/expand-condsets-impuse.mir
U test/CodeGen/Hexagon/expand-condsets-same-inputs.mir
A test/CodeGen/Hexagon/autohvx/isel-setcc-pair.ll
U test/CodeGen/Hexagon/mux-kill1.mir
A test/CodeGen/Hexagon/autohvx/shift-64b.ll
U test/CodeGen/Hexagon/unreachable-mbb-phi-subreg.mir
U test/CodeGen/Hexagon/duplex-addi-global-imm.mir
U test/CodeGen/Hexagon/addrmode-globoff.mir
U test/CodeGen/Hexagon/regalloc-bad-undef.mir
U test/CodeGen/Hexagon/rdf-ehlabel-live.mir
A test/CodeGen/Hexagon/autohvx/isel-build-undef.ll
A test/CodeGen/Hexagon/autohvx/isel-const-splat-bitcast.ll
U test/CodeGen/Hexagon/target-flag-ext.mir
U test/CodeGen/Hexagon/branch-folder-hoist-kills.mir
U test/CodeGen/Hexagon/cext-opt-numops.mir
U test/CodeGen/Hexagon/livephysregs-add-pristines.mir
A test/CodeGen/Hexagon/autohvx/shift-128b.ll
U test/CodeGen/Hexagon/addrmode-rr-to-io.mir
U test/CodeGen/Hexagon/cext-opt-shifted-range.mir
U test/CodeGen/Hexagon/packetize-load-store-aliasing.mir
U test/CodeGen/Hexagon/mux-kill2.mir
U test/CodeGen/BPF/sockex2.ll
U test/CodeGen/Mips/instverify/dins-pos.mir
U test/CodeGen/Mips/instverify/ins-pos-size.mir
U test/CodeGen/Mips/instverify/dins-pos-size.mir
U test/CodeGen/Mips/instverify/dinsm-pos.mir
U test/CodeGen/Mips/instverify/dinsu-pos.mir
U test/CodeGen/Mips/instverify/ins-pos.mir
U test/CodeGen/Mips/mirparser/target-flags-pic.mir
U test/CodeGen/Thumb2/ifcvt-neon-deprecated.mir
U test/CodeGen/Mips/instverify/dinsu-size.mir
U test/CodeGen/Mips/instverify/dextu-pos-size.mir
U test/CodeGen/Mips/instverify/dext-pos.mir
U test/CodeGen/Mips/instverify/ext-size.mir
U test/CodeGen/Mips/instverify/dinsm-pos-size.mir
U test/CodeGen/Mips/instverify/dextm-pos-size.mir
U test/CodeGen/Mips/sll-micromips-r6-encoding.mir
U test/CodeGen/Hexagon/addrmode-keepdeadphis.mir
U test/CodeGen/Hexagon/invalid-dotnew-attempt.mir
U test/CodeGen/Hexagon/ifcvt-impuse-livein.mir
U test/CodeGen/Thumb2/tbb-removeadd.mir
U test/CodeGen/Mips/instverify/dextm-size.mir
U test/CodeGen/Mips/instverify/ext-pos.mir
U test/CodeGen/Mips/instverify/ins-size.mir
U test/CodeGen/Mips/instverify/ext-pos-size.mir
U test/CodeGen/Mips/instverify/dextm-pos.mir
U test/CodeGen/Mips/instverify/dextu-pos.mir
U test/CodeGen/Mips/compactbranches/empty-block.mir
U test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir
U test/CodeGen/AMDGPU/spill-empty-live-interval.mir
U test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
U test/CodeGen/AMDGPU/detect-dead-lanes.mir
U test/CodeGen/AMDGPU/hazard.mir
U test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
U test/CodeGen/Mips/msa/emergency-spill.mir
U test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir
U test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
U test/CodeGen/AMDGPU/fold-operands-order.mir
U test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir
A test/CodeGen/Hexagon/autohvx/isel-anyext-inreg.ll
U test/CodeGen/Hexagon/cext-opt-range-assert.mir
U test/CodeGen/Hexagon/livephysregs-lane-masks.mir
U test/CodeGen/Hexagon/bank-conflict-load.mir
U test/CodeGen/Thumb2/t2sizereduction.mir
U test/CodeGen/Mips/instverify/dinsu-pos-size.mir
U test/CodeGen/Mips/instverify/dextu-size-valid.mir
U test/CodeGen/Mips/instverify/dextu-size.mir
U test/CodeGen/Mips/instverify/dins-size.mir
U test/CodeGen/Mips/instverify/dext-size.mir
U test/CodeGen/Mips/instverify/dinsm-size.mir
U test/CodeGen/Mips/compactbranches/compact-branch-implicit-def.mir
U test/CodeGen/Mips/mirparser/target-flags-pic-o32.mir
U test/CodeGen/Mips/llvm-ir/call.ll
U test/CodeGen/AMDGPU/regcoal-subrange-join.mir
U test/CodeGen/AMDGPU/llvm.dbg.value.ll
U test/CodeGen/AMDGPU/merge-load-store.mir
U test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
U test/CodeGen/Mips/mirparser/target-flags-static-tls.mir
U test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
U test/CodeGen/AMDGPU/waitcnt-permute.mir
U test/CodeGen/AMDGPU/cluster-flat-loads.mir
U test/CodeGen/AMDGPU/clamp-omod-special-case.mir
U test/CodeGen/AMDGPU/fix-vgpr-copies.mir
U test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir
U test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
U test/CodeGen/AMDGPU/insert-waits-exp.mir
U test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
U test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
U test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
U test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
U test/CodeGen/AMDGPU/reduce-saveexec.mir
U test/CodeGen/AMDGPU/movrels-bug.mir
U test/CodeGen/AMDGPU/merge-load-store-vreg.mir
U test/CodeGen/AMDGPU/endpgm-dce.mir
U test/CodeGen/AMDGPU/sdwa-gfx9.mir
U test/CodeGen/AMDGPU/inserted-wait-states.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
U test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
U test/CodeGen/AMDGPU/splitkit.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
U test/CodeGen/AMDGPU/schedule-regpressure.mir
U test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
U test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
U test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
U test/CodeGen/AMDGPU/subreg_interference.mir
U test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
U test/CodeGen/AMDGPU/dead_copy.mir
U test/CodeGen/AMDGPU/bswap.ll
U test/CodeGen/AMDGPU/hazard-inlineasm.mir
U test/CodeGen/AMDGPU/bitreverse.ll
U test/CodeGen/AMDGPU/flat-load-clustering.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
U test/CodeGen/AMDGPU/insert-waits-callee.mir
U test/CodeGen/AMDGPU/regcoalesce-prune.mir
A test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
U test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
U test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
U test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
U test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
U test/CodeGen/AMDGPU/sdwa-preserve.mir
U test/CodeGen/AMDGPU/readlane_exec0.mir
U test/CodeGen/AMDGPU/twoaddr-mad.mir
U test/CodeGen/AMDGPU/debug-value2.ll
U test/CodeGen/AMDGPU/rename-independent-subregs.mir
U test/CodeGen/AMDGPU/misched-killflags.mir
A test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
U test/CodeGen/AMDGPU/limit-coalesce.mir
U test/CodeGen/AMDGPU/wqm.mir
U test/CodeGen/AMDGPU/fold-multiple.mir
U test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
U test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
U test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
U test/CodeGen/AMDGPU/coalescer-subreg-join.mir
U test/CodeGen/SystemZ/fp-cmp-07.mir
U test/CodeGen/SystemZ/cond-move-05.mir
U test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
U include/llvm/CodeGen/LiveRegMatrix.h
A test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
U test/CodeGen/AMDGPU/regcoalesce-dbg.mir
A test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
U test/CodeGen/SystemZ/clear-liverange-spillreg.mir
U test/CodeGen/SystemZ/load-and-test.mir
U test/CodeGen/SystemZ/fp-conv-17.mir
U include/llvm/CodeGen/TargetLowering.h
U lib/Target/X86/X86InstrArithmetic.td
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86MacroFusion.cpp
U test/CodeGen/AMDGPU/waitcnt.mir
U test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
U test/CodeGen/AMDGPU/fix-wwm-liveness.mir
A test/CodeGen/SystemZ/loop-04.ll
U test/CodeGen/SystemZ/pr32505.ll
U test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir
U include/llvm/BinaryFormat/Wasm.h
U include/llvm/CodeGen/AccelTable.h
U test/CodeGen/AMDGPU/smrd.ll
U test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
U test/CodeGen/AMDGPU/shrink-carry.mir
U test/CodeGen/AMDGPU/liveness.mir
U test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
U test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
U test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
U test/CodeGen/AMDGPU/fold-cndmask.mir
U test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
U test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
U test/CodeGen/AMDGPU/syncscopes.ll
U test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
U test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
U test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
U test/CodeGen/AMDGPU/subreg-intervals.mir
U test/CodeGen/AMDGPU/merge-m0.mir
U test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
U test/CodeGen/SystemZ/lower-copy-undef-src.mir
U test/CodeGen/SystemZ/cond-move-04.mir
U test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
U include/llvm/Object/Wasm.h
U include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
U tools/obj2yaml/wasm2yaml.cpp
U unittests/Transforms/Utils/CMakeLists.txt
U unittests/CodeGen/MachineOperandTest.cpp
U lib/Target/X86/X86.h
U include/llvm/IR/IntrinsicsAMDGPU.td
U unittests/Transforms/Utils/Local.cpp
U unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
U lib/Analysis/TargetLibraryInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U tools/llvm-cov/SourceCoverageViewHTML.cpp
U unittests/CodeGen/MachineInstrTest.cpp
U lib/Analysis/Lint.cpp
U lib/Target/ARM/ARMLegalizerInfo.cpp
U tools/dsymutil/DwarfLinker.cpp
A unittests/Transforms/Utils/BasicBlockUtils.cpp
U unittests/MI/LiveIntervalTest.cpp
U lib/Target/ARM/README.txt
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/X86RetpolineThunks.cpp
U lib/Target/Hexagon/HexagonISelLowering.h
U lib/Target/Hexagon/HexagonISelLowering.cpp
U lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
U lib/Target/AMDGPU/SIInstrInfo.cpp
U lib/Target/AMDGPU/AMDGPUISelLowering.h
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
U lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
U lib/Transforms/InstCombine/InstCombineCasts.cpp
U lib/CodeGen/MIRParser/MILexer.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/TailDuplicator.cpp
U lib/Object/WasmObjectFile.cpp
U lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
U lib/Target/AMDGPU/AMDGPUISelLowering.cpp
U lib/Target/AMDGPU/SIInstructions.td
U lib/Transforms/Utils/GlobalStatus.cpp
U lib/Target/AMDGPU/SIISelLowering.cpp
U lib/Target/AMDGPU/AMDGPUInstrInfo.td
U lib/Target/SystemZ/SystemZISelLowering.cpp
U lib/Transforms/Scalar/LoopStrengthReduce.cpp
U lib/Transforms/InstCombine/InstCombineCalls.cpp
U lib/CodeGen/CodeGenPrepare.cpp
U lib/CodeGen/TargetRegisterInfo.cpp
U lib/CodeGen/RegAllocGreedy.cpp
U lib/Target/Hexagon/HexagonPatterns.td
U lib/Target/AMDGPU/VOP2Instructions.td
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
U lib/Transforms/Utils/BasicBlockUtils.cpp
U lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
U lib/MC/WasmObjectWriter.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/MachineOutliner.cpp
U lib/CodeGen/TargetLoweringBase.cpp
U lib/Transforms/IPO/GlobalOpt.cpp
U lib/MC/MCAssembler.cpp
U lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U lib/CodeGen/MachineCombiner.cpp
U lib/CodeGen/LiveRegMatrix.cpp
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U lib/AST/DeclBase.cpp
U lib/AST/RecordLayoutBuilder.cpp
U lib/Format/TokenAnnotator.cpp
U lib/Driver/ToolChains/Gnu.cpp
U lib/Driver/ToolChains/CommonArgs.cpp
U lib/CodeGen/CodeGenModule.cpp
U lib/CodeGen/CGRecordLayoutBuilder.cpp
U test/Sema/mms-bitfields.c
A test/CodeGenCXX/microsoft-abi-emit-dependent.cpp
U test/CodeGen/mms-bitfields.c
A test/CodeGen/no-bitfield-type-align.c
A test/Driver/riscv-gnutools.c
U test/Driver/wasm-toolchain.cpp
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U include/clang/AST/DeclBase.h
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