[www-scripts] Clang Attribute Doc Update: SUCCESS
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Thu Dec 7 03:02:06 PST 2017
UPDATING /opt/clang_commandline_docs//src/llvm LLVM SOURCES
Updating '.':
U lib/Target/ARM/ARMISelLowering.h
U lib/TableGen/StringMatcher.cpp
U lib/Analysis/AliasAnalysis.cpp
U lib/Analysis/ScalarEvolution.cpp
U lib/Analysis/BasicAliasAnalysis.cpp
U lib/Analysis/GlobalsModRef.cpp
U lib/Analysis/MemoryDependenceAnalysis.cpp
U lib/Analysis/InstructionSimplify.cpp
U lib/Target/BPF/BPFISelDAGToDAG.cpp
U lib/Target/Mips/Mips32r6InstrInfo.td
U lib/Target/Mips/MipsInstrInfo.cpp
U lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
U lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
U lib/Target/AMDGPU/SIFoldOperands.cpp
U lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
U lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
U lib/Target/AMDGPU/SIFixWWMLiveness.cpp
U lib/Target/AMDGPU/EvergreenInstructions.td
U lib/Target/AMDGPU/SIPeepholeSDWA.cpp
U lib/Target/AMDGPU/CaymanInstructions.td
U lib/Target/SystemZ/SystemZInstrInfo.td
U lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
U lib/Target/SystemZ/SystemZElimCompare.cpp
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/ARM/ARMExpandPseudoInsts.cpp
U lib/Target/ARM/ARMISelLowering.cpp
U lib/Target/ARM/ARMLoadStoreOptimizer.cpp
U lib/Target/NVPTX/NVPTXPeephole.cpp
U lib/Target/NVPTX/NVPTXIntrinsics.td
U lib/Target/PowerPC/PPCVSXFMAMutate.cpp
U lib/Target/PowerPC/PPCBranchCoalescing.cpp
U lib/Target/PowerPC/PPCMIPeephole.cpp
U lib/Target/PowerPC/PPCQPXLoadSplat.cpp
U lib/Target/PowerPC/PPCInstrInfo.cpp
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrAVX512.td
U lib/Target/X86/README-X86-64.txt
U lib/Target/X86/X86TargetTransformInfo.cpp
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FixupBWInsts.cpp
U lib/Target/X86/X86VZeroUpper.cpp
U lib/Target/RISCV/InstPrinter/RISCVInstPrinter.h
U lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp
U lib/Target/RISCV/RISCVInstrInfoA.td
U lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
U lib/Target/RISCV/RISCVInstrInfoM.td
U lib/Target/RISCV/RISCVInstrFormats.td
U lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
U lib/Target/RISCV/RISCVRegisterInfo.td
U lib/Target/RISCV/RISCVInstrInfo.td
A lib/Target/RISCV/RISCVInstrInfoD.td
U lib/Target/RISCV/RISCV.td
U lib/Target/RISCV/RISCVSubtarget.h
U lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
U lib/Target/AArch64/AArch64ISelLowering.h
A lib/Target/RISCV/RISCVInstrInfoF.td
A lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.h
U lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
U lib/Target/AVR/MCTargetDesc/AVRFixupKinds.h
U lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
U lib/Target/Hexagon/HexagonHardwareLoops.cpp
U lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
U lib/Target/Hexagon/HexagonExpandCondsets.cpp
U lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp
A lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
U lib/Target/Hexagon/HexagonCopyToCombine.cpp
U lib/Target/Hexagon/HexagonNewValueJump.cpp
A lib/ObjectYAML/CodeViewYAMLTypeHashing.cpp
U lib/Transforms/IPO/SampleProfile.cpp
U lib/Transforms/Utils/InlineFunction.cpp
U lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
U lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
U lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
U lib/Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp
U lib/Target/AArch64/AArch64InstrInfo.cpp
U lib/Target/Hexagon/HexagonISelLowering.cpp
U lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
U lib/Target/Hexagon/HexagonISelLowering.h
U lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
U lib/Target/Hexagon/RDFGraph.h
U lib/Target/Hexagon/HexagonConstPropagation.cpp
U lib/Target/Hexagon/HexagonEarlyIfConv.cpp
U lib/ObjectYAML/CMakeLists.txt
U lib/ProfileData/Coverage/CoverageMapping.cpp
U lib/Transforms/Vectorize/LoopVectorize.cpp
U lib/Transforms/Utils/CMakeLists.txt
U lib/Transforms/Scalar/LoopIdiomRecognize.cpp
U lib/CodeGen/RegisterCoalescer.cpp
U lib/Target/AVR/AsmParser/AVRAsmParser.cpp
U lib/Target/AVR/MCTargetDesc/AVRMCExpr.h
U lib/Target/AVR/MCTargetDesc/CMakeLists.txt
A lib/Target/AVR/MCTargetDesc/AVRMCELFStreamer.cpp
U lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
U lib/Target/Hexagon/HexagonPeephole.cpp
U lib/Target/Hexagon/CMakeLists.txt
U lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
U lib/Target/Hexagon/HexagonISelDAGToDAG.h
U lib/Target/Hexagon/HexagonInstrInfo.cpp
U lib/Target/Hexagon/HexagonBlockRanges.cpp
A lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
U lib/Target/Hexagon/HexagonPatterns.td
U lib/ObjectYAML/COFFYAML.cpp
U lib/Transforms/InstCombine/InstCombineAddSub.cpp
U lib/Transforms/Utils/LoopUtils.cpp
U lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
U lib/MC/WasmObjectWriter.cpp
A test/tools/opt-viewer/Inputs/suppress
A test/tools/opt-viewer/Outputs/suppress
U test/DebugInfo/X86/stmt-list-multiple-compile-units.ll
D test/ObjectYAML/CodeView/guid.yaml
U test/CodeGen/WebAssembly/stack-alignment.ll
A lib/Transforms/Utils/CallPromotionUtils.cpp
U lib/MC/MCDwarf.cpp
U lib/MC/MCExpr.cpp
U lib/CodeGen/LiveVariables.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineCombiner.cpp
U lib/CodeGen/InlineSpiller.cpp
U lib/CodeGen/MachineCopyPropagation.cpp
U lib/CodeGen/AsmPrinter/AsmPrinter.cpp
U lib/Object/COFFModuleDefinition.cpp
A test/tools/opt-viewer/Inputs/suppress/s.swift
A test/tools/opt-viewer/Outputs/suppress/s.swift.html
A test/TableGen/AllowDuplicateRegisterNames.td
U test/CodeGen/AMDGPU/indirect-addressing-si.ll
U lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U lib/CodeGen/RegisterScavenging.cpp
U lib/CodeGen/MachineOperand.cpp
U lib/CodeGen/AggressiveAntiDepBreaker.cpp
U lib/CodeGen/ExpandPostRAPseudos.cpp
U lib/CodeGen/BranchFolding.cpp
U lib/CodeGen/TwoAddressInstructionPass.cpp
U test/tools/llvm-dlltool/coff-exports.def
A test/tools/opt-viewer/Outputs/suppress/index.html
U test/DebugInfo/Generic/nodebug.ll
U test/CodeGen/WebAssembly/global.ll
U lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
U lib/CodeGen/LiveIntervalAnalysis.cpp
U lib/CodeGen/RegAllocFast.cpp
U lib/CodeGen/OptimizePHIs.cpp
U lib/CodeGen/MachineCSE.cpp
U lib/CodeGen/CriticalAntiDepBreaker.cpp
U lib/CodeGen/MIRPrinter.cpp
U lib/IR/AutoUpgrade.cpp
A test/tools/opt-viewer/suppress.test
U test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
U test/CodeGen/ARM/fp16-promote.ll
A test/CodeGen/SystemZ/rosbg-02.ll
U test/CodeGen/ARM/2011-11-14-EarlyClobber.ll
U test/CodeGen/AMDGPU/llvm.dbg.value.ll
U test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll
U test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
U test/CodeGen/SystemZ/pr32505.ll
U test/CodeGen/ARM/sched-it-debug-nodes.mir
U lib/CodeGen/TargetLoweringObjectFileImpl.cpp
U lib/CodeGen/TargetRegisterInfo.cpp
U lib/CodeGen/SplitKit.cpp
U lib/CodeGen/MachineInstr.cpp
U lib/CodeGen/ImplicitNullChecks.cpp
U lib/CodeGen/VirtRegMap.cpp
U lib/CodeGen/MachineSink.cpp
U lib/Object/WasmObjectFile.cpp
A test/tools/opt-viewer/Inputs/suppress/s.opt.yaml
A test/ObjectYAML/CodeView/sections.yaml
U test/CodeGen/AMDGPU/schedule-regpressure.mir
U test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
U test/CodeGen/ARM/subreg-remat.ll
U test/CodeGen/ARM/single-issue-r52.mir
U test/CodeGen/ARM/ifcvt-dead-def.ll
U test/CodeGen/ARM/misched-int-basic.mir
U test/CodeGen/PowerPC/quadint-return.ll
U test/CodeGen/X86/illegal-bitfield-loadstore.ll
U test/CodeGen/X86/vector-shuffle-512-v16.ll
U test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
U test/CodeGen/X86/vec_insert-5.ll
U test/CodeGen/X86/avx2-conversions.ll
U test/CodeGen/X86/vpshufbitqbm-intrinsics.ll
U test/CodeGen/X86/coalescer-dce.ll
U test/CodeGen/ARM/Windows/vla-cpsr.ll
U test/CodeGen/ARM/vldm-liveness.mir
U test/CodeGen/ARM/2014-01-09-pseudo_expand_implicit_reg.ll
U test/CodeGen/PowerPC/byval-agg-info.ll
U test/CodeGen/X86/pr22970.ll
U test/CodeGen/X86/lzcnt-schedule.ll
U test/CodeGen/X86/avx512bwvl-vec-test-testn.ll
U test/CodeGen/X86/avx512-shuffles/partial_permute.ll
U test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
U test/CodeGen/X86/vector-shift-lshr-256.ll
U test/CodeGen/X86/oddshuffles.ll
U test/CodeGen/ARM/misched-int-basic-thumb2.mir
A test/CodeGen/NVPTX/fns.ll
U test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
U test/CodeGen/X86/avx512vl-vec-cmp.ll
U test/CodeGen/X86/vector-shuffle-256-v4.ll
U test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
U test/CodeGen/X86/avx512-cvt.ll
U test/CodeGen/X86/clz.ll
U test/CodeGen/X86/sse-schedule.ll
A test/CodeGen/ARM/arm-storebytesmerge.ll
U test/CodeGen/ARM/misched-copy-arm.ll
U test/CodeGen/ARM/crash-greedy.ll
U test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
U test/CodeGen/X86/vector-popcnt-256.ll
U test/CodeGen/X86/avx512-shuffle-schedule.ll
U test/CodeGen/X86/avx512vl-vec-test-testn.ll
U test/CodeGen/X86/horizontal-reduce-umax.ll
U test/CodeGen/X86/pr28560.ll
U test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
U test/CodeGen/X86/loop-search.ll
U test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll
U test/CodeGen/X86/avx512-build-vector.ll
U test/CodeGen/X86/pmul.ll
U test/CodeGen/X86/avx512-bugfix-23634.ll
U test/CodeGen/X86/movmsk.ll
U test/CodeGen/X86/avx512-intrinsics.ll
U test/CodeGen/X86/psubus.ll
U test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll
U test/CodeGen/X86/misched-copy.ll
U test/CodeGen/X86/masked_gather_scatter.ll
U test/CodeGen/X86/vec_ins_extract-1.ll
U test/CodeGen/X86/avx-vinsertf128.ll
U test/CodeGen/X86/schedule-x86_64.ll
U test/CodeGen/X86/bmi-schedule.ll
U test/CodeGen/X86/lea-opt-cse3.ll
U test/CodeGen/X86/cmovcmov.ll
U test/CodeGen/X86/compress_expand.ll
U test/CodeGen/X86/sar_fold64.ll
U test/CodeGen/X86/x86-interleaved-access.ll
U test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
U test/CodeGen/X86/gpr-to-mask.ll
U test/CodeGen/X86/vec_int_to_fp.ll
U test/CodeGen/X86/avx512-vec3-crash.ll
U test/CodeGen/X86/vector-rotate-256.ll
U test/CodeGen/X86/avx512vl-intrinsics.ll
U test/CodeGen/X86/masked_memop.ll
U test/CodeGen/X86/avx512-select.ll
U test/CodeGen/X86/promote-vec3.ll
U test/CodeGen/X86/vector-shuffle-variable-128.ll
U test/CodeGen/X86/shrink-compare.ll
U test/CodeGen/X86/vec_minmax_sint.ll
U test/CodeGen/X86/ctpop-combine.ll
U test/CodeGen/X86/or-lea.ll
U test/CodeGen/X86/pr32329.ll
U test/CodeGen/X86/vector-half-conversions.ll
U test/CodeGen/X86/shift-double.ll
U test/CodeGen/X86/verifier-phi-fail0.mir
U test/CodeGen/X86/vector-compare-results.ll
U test/CodeGen/X86/avx2-shift.ll
U test/CodeGen/X86/avx512-ext.ll
U test/CodeGen/X86/sext-i1.ll
U test/CodeGen/X86/vector-tzcnt-256.ll
U test/CodeGen/X86/fast-isel-cmp.ll
U test/CodeGen/X86/vec_insert-4.ll
U test/CodeGen/X86/machine-cse.ll
U test/CodeGen/X86/pr32345.ll
U test/CodeGen/X86/avx512-vec-cmp.ll
U test/CodeGen/X86/cmov.ll
U test/CodeGen/X86/vec_insert-8.ll
U test/CodeGen/X86/2010-05-12-FastAllocKills.ll
U test/CodeGen/X86/avx-cmp.ll
U test/CodeGen/X86/avx512-insert-extract.ll
U test/CodeGen/X86/vector-compare-any_of.ll
U test/CodeGen/X86/GlobalISel/gep.ll
U test/CodeGen/X86/horizontal-reduce-smax.ll
U test/CodeGen/X86/avx2-vector-shifts.ll
U test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
U test/CodeGen/X86/vector-shift-lshr-128.ll
U test/CodeGen/X86/remat-phys-dead.ll
U test/CodeGen/X86/pr34653.ll
U test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
U test/CodeGen/X86/avx512-intrinsics-upgrade.ll
U test/CodeGen/X86/bitcast-setcc-256.ll
U test/CodeGen/X86/lea-3.ll
U test/CodeGen/X86/GlobalISel/add-scalar.ll
U test/CodeGen/X86/urem-i8-constant.ll
U test/CodeGen/X86/vector-compare-all_of.ll
U test/CodeGen/X86/vector-shuffle-avx512.ll
U test/CodeGen/X86/avx512-cmp-kor-sequence.ll
U test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
U test/CodeGen/X86/urem-power-of-two.ll
U test/CodeGen/X86/bypass-slow-division-32.ll
U test/CodeGen/X86/divide-by-constant.ll
U test/CodeGen/X86/reduce-trunc-shl.ll
U test/CodeGen/X86/iabs.ll
U test/CodeGen/X86/GlobalISel/x86_64-fallback.ll
U test/CodeGen/X86/machine-cp.ll
U test/CodeGen/X86/widen_bitops-0.ll
U test/CodeGen/X86/negate-i1.ll
U test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
U test/CodeGen/X86/lzcnt-zext-cmp.ll
U test/CodeGen/X86/critical-edge-split-2.ll
U test/CodeGen/X86/bypass-slow-division-64.ll
U test/CodeGen/X86/avx512-regcall-Mask.ll
U test/CodeGen/X86/fast-isel-sext-zext.ll
U test/CodeGen/X86/bitreverse.ll
U test/CodeGen/X86/sse41-schedule.ll
U test/CodeGen/X86/vselect-pcmp.ll
U test/CodeGen/X86/add-sub-nsw-nuw.ll
U test/CodeGen/X86/broadcastm-lowering.ll
U test/CodeGen/X86/umul-with-overflow.ll
U test/CodeGen/X86/avx512dqvl-intrinsics.ll
U test/CodeGen/X86/vector-popcnt-128.ll
U test/CodeGen/X86/liveness-local-regalloc.ll
U test/CodeGen/X86/GlobalISel/ext.ll
U test/CodeGen/X86/GlobalISel/ext-x86-64.ll
U test/CodeGen/X86/vector-shuffle-v1.ll
U test/CodeGen/X86/vector-shift-ashr-256.ll
U test/CodeGen/X86/vector-trunc-math.ll
U test/CodeGen/X86/vector-shift-shl-256.ll
U test/CodeGen/X86/popcnt.ll
U test/CodeGen/X86/f16c-intrinsics-fast-isel.ll
U test/CodeGen/X86/vector-lzcnt-256.ll
U test/CodeGen/X86/popcnt-schedule.ll
U test/CodeGen/X86/bitcast-and-setcc-256.ll
U test/CodeGen/X86/vector-rotate-128.ll
U test/CodeGen/X86/pr32282.ll
U test/CodeGen/X86/avx512f-vec-test-testn.ll
U test/CodeGen/X86/bool-simplify.ll
U test/CodeGen/X86/avx512-mask-op.ll
U test/CodeGen/X86/select.ll
U test/CodeGen/X86/vector-trunc.ll
U test/CodeGen/X86/vec_insert-mmx.ll
U test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
U test/CodeGen/X86/cmov-promotion.ll
U test/CodeGen/X86/bitcast-setcc-512.ll
U test/CodeGen/X86/avx512-memfold.ll
U test/CodeGen/X86/addcarry.ll
U test/CodeGen/X86/tbm_patterns.ll
U test/CodeGen/X86/horizontal-reduce-umin.ll
U test/CodeGen/X86/imul.ll
U test/CodeGen/X86/divrem.ll
U test/CodeGen/X86/vector-tzcnt-128.ll
U test/CodeGen/X86/subvector-broadcast.ll
U test/CodeGen/X86/avx512-vbroadcast.ll
U test/CodeGen/X86/avx-schedule.ll
U test/CodeGen/X86/cmov-into-branch.ll
U test/CodeGen/X86/avx-intrinsics-fast-isel.ll
U test/CodeGen/X86/bool-vector.ll
U test/CodeGen/X86/fast-isel-shift.ll
U test/CodeGen/X86/avx512-calling-conv.ll
U test/CodeGen/X86/anyext.ll
U test/CodeGen/X86/fixup-bw-inst.mir
U test/CodeGen/X86/dagcombine-cse.ll
U test/CodeGen/X86/phys_subreg_coalesce-3.ll
U test/CodeGen/X86/vec_fp_to_int.ll
U test/CodeGen/X86/vec_cmp_uint-128.ll
U test/CodeGen/X86/avx512-hadd-hsub.ll
U test/CodeGen/X86/vector-extend-inreg.ll
U test/CodeGen/X86/avx-cast.ll
U test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
U test/CodeGen/X86/select_const.ll
U test/CodeGen/X86/vector-shuffle-combining-avx2.ll
U test/CodeGen/X86/vector-sext.ll
U test/CodeGen/X86/inline-asm-fpstack.ll
U test/CodeGen/X86/bitcast-setcc-128.ll
U test/CodeGen/X86/vector-bitreverse.ll
U test/CodeGen/X86/avx512-regcall-NoMask.ll
U test/CodeGen/X86/shuffle-vs-trunc-256.ll
U test/CodeGen/X86/sse2-schedule.ll
U test/CodeGen/X86/avx512-arith.ll
U test/CodeGen/X86/avx-vzeroupper.ll
U test/CodeGen/X86/shift-combine.ll
U test/CodeGen/X86/2010-04-08-CoalescerBug.ll
U test/CodeGen/X86/combine-abs.ll
U test/CodeGen/X86/add.ll
U test/CodeGen/X86/avx512-extract-subvector.ll
U test/CodeGen/X86/pr28173.ll
U test/CodeGen/X86/avx512-trunc.ll
U test/CodeGen/X86/handle-move.ll
U test/CodeGen/AArch64/arm64-narrow-st-merge.ll
U test/CodeGen/AArch64/tailcall-explicit-sret.ll
U test/CodeGen/AArch64/arm64-complex-ret.ll
U test/CodeGen/AArch64/tailcall-implicit-sret.ll
A test/CodeGen/Hexagon/autohvx
U test/CodeGen/X86/setcc-lowering.ll
U test/CodeGen/X86/atomic-eflags-reuse.ll
U test/CodeGen/X86/vector-shift-ashr-128.ll
U test/CodeGen/X86/2010-02-23-RematImplicitSubreg.ll
U test/CodeGen/X86/vector-shift-shl-128.ll
U test/CodeGen/X86/bitcast-int-to-vector.ll
U test/CodeGen/X86/pr29061.ll
U test/CodeGen/X86/avx512-shift.ll
U test/CodeGen/X86/avx2-schedule.ll
U test/CodeGen/AArch64/GlobalISel/verify-selected.mir
U test/CodeGen/AArch64/arm64-2012-05-22-LdStOptBug.ll
U test/CodeGen/AArch64/aarch64-a57-fp-load-balancing.ll
U test/CodeGen/X86/avx512dq-mask-op.ll
U test/CodeGen/X86/avx512dq-intrinsics.ll
U test/CodeGen/X86/half.ll
U test/CodeGen/X86/bitcast-int-to-vector-bool.ll
U test/CodeGen/X86/sse42-schedule.ll
U test/CodeGen/X86/mul-constant-i32.ll
U test/CodeGen/X86/norex-subreg.ll
U test/CodeGen/X86/bitcast-and-setcc-512.ll
U test/CodeGen/X86/bitcast-and-setcc-128.ll
U test/CodeGen/AArch64/arm64-ldp-cluster.ll
U test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir
U test/CodeGen/AArch64/arm64-misched-forwarding-A53.ll
U test/CodeGen/X86/fixup-bw-copy.ll
U test/CodeGen/X86/lea32-schedule.ll
U test/CodeGen/X86/avx512bwvl-intrinsics.ll
U test/CodeGen/X86/vector-shuffle-512-v8.ll
U test/CodeGen/X86/vec_minmax_uint.ll
U test/CodeGen/X86/bmi.ll
U test/CodeGen/X86/divrem8_ext.ll
U test/CodeGen/X86/mul-constant-i16.ll
U test/CodeGen/X86/avx512bw-mov.ll
U test/CodeGen/AVR/select-must-add-unconditional-jump.ll
U test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
U test/CodeGen/AArch64/tailcall_misched_graph.ll
U test/CodeGen/AArch64/scheduledag-constreg.mir
U test/CodeGen/AArch64/machine-copy-prop.ll
U test/CodeGen/AArch64/arm64-csldst-mmo.ll
A test/CodeGen/Hexagon/autohvx/extract-element.ll
U test/CodeGen/AArch64/arm64-dead-register-def-bug.ll
U test/CodeGen/AArch64/arm64-variadic-aapcs.ll
A test/CodeGen/Hexagon/autohvx/deal-64b.ll
A test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
U test/CodeGen/Hexagon/branch-folder-hoist-kills.mir
U test/CodeGen/X86/vector-shuffle-variable-256.ll
U test/CodeGen/X86/avx512-insert-extract_i1.ll
U test/CodeGen/X86/extractelement-index.ll
U test/CodeGen/X86/mul-constant-result.ll
U test/CodeGen/X86/avx512-schedule.ll
U test/CodeGen/X86/vec_ss_load_fold.ll
U test/CodeGen/X86/vector-lzcnt-128.ll
U test/CodeGen/X86/horizontal-reduce-smin.ll
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