[Openmp-commits] [clang] [openmp] [OFFLOAD] Build DeviceRTL with SPIRV backend (PR #174675)

[Joseph Huber via Openmp-commits]

================
@@ -258,6 +258,80 @@ void setCriticalLock(omp_lock_t *Lock) { setLock(Lock); }
 #endif
 ///}
 
+#if defined(__SPIRV__)
+
+MemorySemantics_t convertOrderingType(atomic::OrderingTy Ordering) {
+  switch (Ordering) {
+  default:
+    __builtin_unreachable();
+  case atomic::relaxed:
+    return MemorySemantics_t::Relaxed;
+  case atomic::acquire:
+    return MemorySemantics_t::Acquire;
+  case atomic::release:
+    return MemorySemantics_t::Release;
+  case atomic::acq_rel:
+    return MemorySemantics_t::AcquireRelease;
+  case atomic::seq_cst:
+    return MemorySemantics_t::SequentiallyConsistent;
+  }
+}
+uint32_t atomicInc(uint32_t *Address, uint32_t Val, atomic::OrderingTy Ordering,
+                   atomic::MemScopeTy MemScope) {
+  return __spirv_AtomicIAdd(Address, (int)MemScope,
+                            convertOrderingType(Ordering), Val);
+}
+
+void namedBarrierInit() {} // TODO
+void namedBarrier() {}     // TODO
+void fenceTeam(atomic::OrderingTy Ordering) {
+  return __spirv_MemoryBarrier(Scope_t::Workgroup,
+                               0x100 | convertOrderingType(Ordering));
+}
+void fenceKernel(atomic::OrderingTy Ordering) {
+  return __spirv_MemoryBarrier(Scope_t::Device,
+                               0x200 | convertOrderingType(Ordering));
+}
+void fenceSystem(atomic::OrderingTy Ordering) {
+  return __spirv_MemoryBarrier(Scope_t::CrossDevice,
+                               0x200 | convertOrderingType(Ordering));
+}
----------------
jhuber6 wrote:

AFAIK the codegen for the scoped thread fence I added should work here too https://godbolt.org/z/K35Kz6dG1

https://github.com/llvm/llvm-project/pull/174675