[Openmp-commits] [PATCH] D145290: [OpenMP] Ensure memory fences are created with barriers for AMDGPUs

[Dhruva Chakrabarti via Phabricator via Openmp-commits]

dhruvachak added inline comments.


================
Comment at: openmp/libomptarget/DeviceRTL/src/Synchronization.cpp:266
+  if (Ordering != atomic::relaxed)
+    fenceTeam(Ordering == atomic::acq_rel ? atomic::release : atomic::seq_cst);
+
----------------
What if I want a release fence before the barrier and nothing else? As a client, I pass in atomic::release and I get a seq_cst fence before and after the barrier. Seems like an overkill.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D145290/new/

https://reviews.llvm.org/D145290