[Mlir-commits] [mlir] a5bc26f - [mlir][SPIR-V] Support atomic_rmw xori in MemRefToSPIRV (#213204)

[llvmlistbot at llvm.org]

Author: Arseniy Obolenskiy
Date: 2026-09-23T16:11:06+02:00
New Revision: a5bc26f7d2f4d9fbe299288788e1e0377fb406c3

URL: https://github.com/llvm/llvm-project/commit/a5bc26f7d2f4d9fbe299288788e1e0377fb406c3
DIFF: https://github.com/llvm/llvm-project/commit/a5bc26f7d2f4d9fbe299288788e1e0377fb406c3.diff

LOG: [mlir][SPIR-V] Support atomic_rmw xori in MemRefToSPIRV (#213204)

Added: 
    

Modified: 
    mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
    mlir/test/Conversion/MemRefToSPIRV/atomic.mlir

Removed: 
    


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diff  --git a/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp b/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
index 88802b9e2e5584..c93fc25b0ca379 100644
--- a/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
+++ b/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
@@ -543,6 +543,7 @@ AtomicRMWOpPattern::matchAndRewrite(memref::AtomicRMWOp atomicOp,
       ATOMIC_CASE(minu, AtomicUMinOp);
       ATOMIC_CASE(ori, AtomicOrOp);
       ATOMIC_CASE(andi, AtomicAndOp);
+      ATOMIC_CASE(xori, AtomicXorOp);
     default:
       return rewriter.notifyMatchFailure(atomicOp, "unimplemented atomic kind");
     }

diff  --git a/mlir/test/Conversion/MemRefToSPIRV/atomic.mlir b/mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
index d37aa302933f83..74790a354e7717 100644
--- a/mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
+++ b/mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
@@ -72,6 +72,16 @@ func.func @atomic_andi_storage_buffer(%value: i32, %memref: memref<2x3x4xi32, #s
   return %0: i32
 }
 
+//      CHECK: func.func @atomic_xori_workgroup
+// CHECK-SAME: (%[[VAL:.+]]: i32,
+func.func @atomic_xori_workgroup(%value: i32, %memref: memref<2x3x4xi32, #spirv.storage_class<Workgroup>>, %i0: index, %i1: index, %i2: index) -> i32 {
+  // CHECK: %[[AC:.+]] = spirv.AccessChain
+  // CHECK: %[[ATOMIC:.+]] = spirv.AtomicXor <Workgroup> <AcquireRelease|WorkgroupMemory> %[[AC]], %[[VAL]] : !spirv.ptr<i32, Workgroup>
+  // CHECK: return %[[ATOMIC]]
+  %0 = memref.atomic_rmw "xori" %value, %memref[%i0, %i1, %i2] : (i32, memref<2x3x4xi32, #spirv.storage_class<Workgroup>>) -> i32
+  return %0: i32
+}
+
 }
 
 // -----