[Mlir-commits] [mlir] [mlir][x86] Add extra patterns for AMX nano-kernel lowering (acc with zero constant) (PR #222513)

[Arun Thangamani]

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@@ -1124,6 +1146,14 @@ struct VectorContractToAMXDotProduct
               "the re-write conditions either the dimensions are "
               "wrong or MemRef source are different or many users.");
 
+        Operation *contractReadOp =
+            traceToVectorReadLikeParentOperation(contract.getAcc());
+
+        if (isAccZeroVectorConstant != isZeroVectorConstant(contractReadOp))
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arun-thmn wrote:

This is to validate whether all the `vector.contract` does follow the same `acc` pattern either `cst_zero` or from `transfer_read/load`.

https://github.com/llvm/llvm-project/pull/222513