[Mlir-commits] [mlir] [MLIR][XeGPU] Optimize instruction granularity for elemwise (PR #220986)

[Artem Kroviakov]

akroviakov wrote:

I agree that the scope is limited to inst_data, but I do not think it should be a "silent" pre-processing of the blocking pass.

The optimization fixes propagation's shortcoming of placing the conflict resolution further up than needed. The current state fixes the issue close to its source and in such a way that the user does not see the suboptimal IR between passes. Shifting to blocking surfaces the suboptimal propagation result and introduces an opaque layout transform as a pre-processing of another pass.

Also, the debugging will be less transparent: propagation reports one instruction size, but blocking may fail or succeed using some opaque result of the optimization that is not easily inferred from the input IR. In long code sequences, it is already sometimes difficult to trace layouts with temporary layout recovery being "implicit", a layout transformation on top of that would only make it harder to debug, without any benefit to the user.

We could guard the application of this optimization through a layoutKind check to only work on inst level.

https://github.com/llvm/llvm-project/pull/220986