[Mlir-commits] [mlir] [mlir][xegpu] Raise the reduction vector size to match maxReduceVectorSize (PR #225122)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp --diff_from_common_commit
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``````````diff
diff --git a/mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp b/mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
index 657bcab42..e6901cce2 100644
--- a/mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
+++ b/mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
@@ -1275,10 +1275,10 @@ compute2DBlockIOLaneLayout(ArrayRef<int64_t> instShape, int64_t subgroupSize,
 ///
 /// 3. Raise lane_data until a lane packs `maxReduceVectorSize` elements, on one
 ///    undistributed dim -- lane_layout 1, so every lane already spans its full
-///    extent and only inst_data widens. What lane_data packs elsewhere comes off
-///    the budget first, and the chosen dim is multiplied up, never overwritten.
-///    Prefer the dim just outside the innermost two, else the innermost
-///    undistributed dim.
+///    extent and only inst_data widens. What lane_data packs elsewhere comes
+///    off the budget first, and the chosen dim is multiplied up, never
+///    overwritten. Prefer the dim just outside the innermost two, else the
+///    innermost undistributed dim.
 ///
 /// e.g. src=[16,32,32] reduce [2], consumer lane=[1,2] ->
 /// lane_layout=[1,2,8], lane_data=[16,1,1], inst_data=[16,2,8].

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https://github.com/llvm/llvm-project/pull/225122