[Mlir-commits] [mlir] [mlir][linalg] Hoist masked vector transfer pairs (PR #221481)

[Hugo Pompougnac]

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@@ -233,13 +238,25 @@ void mlir::linalg::hoistRedundantVectorTransfers(Operation *root,
                         << "\n");
 
       SetVector<Operation *> forwardSlice;
-      getForwardSlice(transferRead.getOperation(), &forwardSlice);
+      getForwardSlice(readUnit, &forwardSlice);
+      // A forward slice does not follow a value out of a `vector.mask` region,
+      // so re-slice from each enclosing mask op to reach the write.
+      for (unsigned i = 0; i < forwardSlice.size(); ++i) {
+        auto mask = forwardSlice[i]->getParentOfType<vector::MaskOp>();
+        if (mask && forwardSlice.insert(mask.getOperation()))
+          getForwardSlice(mask.getOperation(), &forwardSlice);
+      }
 
       // Look for the last TransferWriteOp in the forwardSlice of
-      // `transferRead` that operates on the same memref.
+      // `transferRead` that operates on the same memref. A masked write appears
+      // as the `vector.mask` op wrapping it.
       vector::TransferWriteOp transferWrite;
       for (auto *sliceOp : llvm::reverse(forwardSlice)) {
         auto candidateWrite = dyn_cast<vector::TransferWriteOp>(sliceOp);
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qaco wrote:

Good catch on the missing comment, but this branch is gone in the latest revision: it was only reachable because of the re-slice loop above.

https://github.com/llvm/llvm-project/pull/221481