[Mlir-commits] [mlir] [mlir][gpu] Derive has-redux from the chip in the NVVM pipeline (PR #221393)

Alessandro Potenza llvmlistbot at llvm.org
Mon Sep 14 00:11:30 PDT 2026

Previous message: [Mlir-commits] [mlir] [mlir][gpu] Derive has-redux from the chip in the NVVM pipeline (PR #221393)
Next message: [Mlir-commits] [mlir] [mlir][Affine] Fix loadCSE replacing a load with one already scheduled for erasure (PR #217511)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

alepot55 wrote:

Done, outlined as `chipHasRedux` in 37ceadb53eb7.

https://github.com/llvm/llvm-project/pull/221393

Previous message: [Mlir-commits] [mlir] [mlir][gpu] Derive has-redux from the chip in the NVVM pipeline (PR #221393)
Next message: [Mlir-commits] [mlir] [mlir][Affine] Fix loadCSE replacing a load with one already scheduled for erasure (PR #217511)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the Mlir-commits mailing list