[Mlir-commits] [mlir] [mlir][x86] Add extra patterns for AMX nano-kernel lowering (acc with zero constant) (PR #222513)

Julian Oppermann llvmlistbot at llvm.org
Thu Sep 10 05:21:42 PDT 2026


================
@@ -1124,6 +1154,16 @@ struct VectorContractToAMXDotProduct
               "the re-write conditions either the dimensions are "
               "wrong or MemRef source are different or many users.");
 
+        Operation *contractReadOp =
+            traceToVectorReadLikeParentOperation(contract.getAcc());
+
+        if ((isAccZeroVectorConstant &&
+             !isZeroVectorConstant(contractReadOp)) ||
+            (!isAccZeroVectorConstant && isZeroVectorConstant(contractReadOp)))
----------------
jopperm wrote:

Doesn't this simplify to `isAccZeroVectorConstant != isZeroVectorConstant(contractReadOp)`?

https://github.com/llvm/llvm-project/pull/222513


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