[Mlir-commits] [mlir] 8c8aa74 - [mlir][LLVM] Add pdep and pext intrinsics (#220768)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Sep 8 06:53:01 PDT 2026
Author: Letu Ren
Date: 2026-09-08T15:52:56+02:00
New Revision: 8c8aa74533a841a7f61dac5e80c8241799458dd6
URL: https://github.com/llvm/llvm-project/commit/8c8aa74533a841a7f61dac5e80c8241799458dd6
DIFF: https://github.com/llvm/llvm-project/commit/8c8aa74533a841a7f61dac5e80c8241799458dd6.diff
LOG: [mlir][LLVM] Add pdep and pext intrinsics (#220768)
Assisted-by: grok-4.6
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Added:
Modified:
mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
mlir/test/Target/LLVMIR/Import/intrinsic.ll
mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index 5eb58b16a5216..38b1661fcd1fe 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -179,6 +179,8 @@ def LLVM_CountTrailingZerosOp : LLVM_CountZerosIntrOp<"cttz">;
def LLVM_CtPopOp : LLVM_UnaryIntrOpI<"ctpop">;
def LLVM_FshlOp : LLVM_TernarySameArgsIntrOpI<"fshl">;
def LLVM_FshrOp : LLVM_TernarySameArgsIntrOpI<"fshr">;
+def LLVM_PdepOp : LLVM_BinarySameArgsIntrOpI<"pdep">;
+def LLVM_PextOp : LLVM_BinarySameArgsIntrOpI<"pext">;
def LLVM_MaxNumOp : LLVM_BinarySameArgsIntrOpF<"maxnum">;
def LLVM_MinNumOp : LLVM_BinarySameArgsIntrOpF<"minnum">;
def LLVM_MaximumOp : LLVM_BinarySameArgsIntrOpF<"maximum">;
diff --git a/mlir/test/Target/LLVMIR/Import/intrinsic.ll b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
index aaebaa2f46d1c..bfd0135f96e44 100644
--- a/mlir/test/Target/LLVMIR/Import/intrinsic.ll
+++ b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -371,6 +371,24 @@ define void @fshr_test(i32 %0, i32 %1, i32 %2, <8 x i32> %3, <8 x i32> %4, <8 x
ret void
}
+; CHECK-LABEL: llvm.func @pdep_test
+define void @pdep_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
+ ; CHECK: llvm.intr.pdep(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
+ %5 = call i32 @llvm.pdep.i32(i32 %0, i32 %1)
+ ; CHECK: llvm.intr.pdep(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+ %6 = call <8 x i32> @llvm.pdep.v8i32(<8 x i32> %2, <8 x i32> %3)
+ ret void
+}
+
+; CHECK-LABEL: llvm.func @pext_test
+define void @pext_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
+ ; CHECK: llvm.intr.pext(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
+ %5 = call i32 @llvm.pext.i32(i32 %0, i32 %1)
+ ; CHECK: llvm.intr.pext(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+ %6 = call <8 x i32> @llvm.pext.v8i32(<8 x i32> %2, <8 x i32> %3)
+ ret void
+}
+
; CHECK-LABEL: llvm.func @maximum_test
define void @maximum_test(float %0, float %1, <8 x float> %2, <8 x float> %3) {
; CHECK: llvm.intr.maximum(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
@@ -1776,6 +1794,10 @@ declare i32 @llvm.fshl.i32(i32, i32, i32)
declare <8 x i32> @llvm.fshl.v8i32(<8 x i32>, <8 x i32>, <8 x i32>)
declare i32 @llvm.fshr.i32(i32, i32, i32)
declare <8 x i32> @llvm.fshr.v8i32(<8 x i32>, <8 x i32>, <8 x i32>)
+declare i32 @llvm.pdep.i32(i32, i32)
+declare <8 x i32> @llvm.pdep.v8i32(<8 x i32>, <8 x i32>)
+declare i32 @llvm.pext.i32(i32, i32)
+declare <8 x i32> @llvm.pext.v8i32(<8 x i32>, <8 x i32>)
declare float @llvm.maximum.f32(float, float)
declare <8 x float> @llvm.maximum.v8f32(<8 x float>, <8 x float>)
declare float @llvm.minimum.f32(float, float)
diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
index b3776c9a99f97..772c3f4004509 100644
--- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
@@ -394,6 +394,24 @@ llvm.func @fshr_test(%arg0: i32, %arg1: i32, %arg2: i32, %arg3: vector<8xi32>, %
llvm.return
}
+// CHECK-LABEL: @pdep_test
+llvm.func @pdep_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
+ // CHECK: call i32 @llvm.pdep.i32
+ "llvm.intr.pdep"(%arg0, %arg1) : (i32, i32) -> i32
+ // CHECK: call <8 x i32> @llvm.pdep.v8i32
+ "llvm.intr.pdep"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+ llvm.return
+}
+
+// CHECK-LABEL: @pext_test
+llvm.func @pext_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
+ // CHECK: call i32 @llvm.pext.i32
+ "llvm.intr.pext"(%arg0, %arg1) : (i32, i32) -> i32
+ // CHECK: call <8 x i32> @llvm.pext.v8i32
+ "llvm.intr.pext"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
+ llvm.return
+}
+
// CHECK-LABEL: @maximum_test
llvm.func @maximum_test(%arg0: f32, %arg1: f32, %arg2: vector<8xf32>, %arg3: vector<8xf32>) {
// CHECK: call float @llvm.maximum.f32
More information about the Mlir-commits
mailing list