[Mlir-commits] [mlir] [mlir][tosa] Add F32 to F16 type narrowing pass (PR #218900)

[Luke Hutton]

================
@@ -386,13 +414,17 @@ LogicalResult convertGenericOp(Operation *op, ValueRange operands,
     }
 
     if (const auto typeAttr = dyn_cast<TypeAttr>(attribute)) {
-      FailureOr<Attribute> convertedAttr =
-          convertAttributeWithTypeConverter<Kind>(typeAttr, typeAttr.getValue(),
-                                                  typeConverter);
-      if (failed(convertedAttr))
+      if (!convertAccumulatorType &&
+          namedAttribute.getName().getValue() == "acc_type") {
+        state.addAttribute(namedAttribute.getName(), attribute);
+        continue;
+      }
+      Type convertedType = typeConverter->convertType(typeAttr.getValue());
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lhutton1 wrote:

This appears to be circumventing `convertAttributeWithTypeConverter` which appears to have an additional constraint `typeNeedsConversion`. I've not checked, though I'm wondering if this introduces a bug such that any accumulator type e.g. `acc_type = fp8` will become `acc_type = fp16`, rather than just the source data type (fp32 in this case)?

https://github.com/llvm/llvm-project/pull/218900