[Mlir-commits] [llvm] [mlir] [AMDGPU] Carry MFMA C/D policy into MIR (PR #236909)
Matt Arsenault
llvmlistbot at llvm.org
Thu Oct 29 14:47:50 PDT 2026
================
@@ -3772,3 +3769,17 @@ raw_ostream &operator<<(raw_ostream &OS, const AMDGPU::TargetIDSetting S) {
}
} // namespace llvm
+
+std::optional<llvm::AMDGPU::MFMACDRegClass>
+llvm::AMDGPU::getMFMACDRegClass(const CallBase &Call) {
+ Attribute A = Call.getAttributes().getFnAttr(MFMACDRegClassAttr);
+ if (!A.isValid())
+ return MFMACDRegClass::Auto;
+ if (!Call.getIntrinsicID() || !Intrinsic::getBaseName(Call.getIntrinsicID())
+ .starts_with("llvm.amdgcn.mfma."))
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arsenm wrote:
This is not a reasonable way to implement passing information into the backend
https://github.com/llvm/llvm-project/pull/236909
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