[Mlir-commits] [mlir] [mlir][vector] Promote in-bounds sub-vector transfer reads with Mem2Reg (PR #236320)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Sat Oct 31 03:43:01 PDT 2026
================
@@ -88,6 +90,45 @@ isPromotableTransfer(VectorTransferOpInterface xferOp, const MemorySlot &slot,
return true;
}
+/// Return constant offsets for a slice contained in the slot vector. Requires:
+/// - Fixed-size vectors of equal rank and element type.
+/// - Identity map and constant nonnegative indices.
+/// - Matching memref/slot shapes, or a zero-offset, unit-stride, same-rank
+/// dynamic subview of a static parent.
+///
+/// Dynamic subview reads use an extent mask to pad outside the runtime extent.
+static FailureOr<SmallVector<int64_t>> getPromotableReadSliceOffsets(
+ TransferReadOp readOp, const MemorySlot &slot,
+ const SmallPtrSetImpl<OpOperand *> &blockingUses) {
+ if (!isTransferSlotAccess(
+ cast<VectorTransferOpInterface>(readOp.getOperation()), slot,
----------------
meinie0826 wrote:
done
https://github.com/llvm/llvm-project/pull/236320
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