[Mlir-commits] [mlir] [mlir][llvm] Add an op for the `llvm.vector.repeat` intrinsic (PR #236453)

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<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-mlir

Author: Andrzej Warzyński (banach-space)

<details>
<summary>Changes</summary>

Add an LLVM dialect op for `llvm.vector.repeat`, which repeats a
fixed-width vector to fill a scalable vector.

The LLVM intrinsic was introduced in:
https://github.com/llvm/llvm-project/pull/208212


---
Full diff: https://github.com/llvm/llvm-project/pull/236453.diff


3 Files Affected:

- (modified) mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td (+16) 
- (modified) mlir/test/Target/LLVMIR/Import/intrinsic.ll (+10) 
- (modified) mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir (+8) 


``````````diff
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index dfd36966644aaa..3695fcf52ebe14 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -1717,6 +1717,10 @@ def LLVM_UBSanTrap : LLVM_ZeroResultIntrOp<"ubsantrap",
   let assemblyFormat = "`failureKind` `=` $failureKind attr-dict";
 }
 
+//
+// Vector intrinsics.
+//
+
 /// Create a call to vscale intrinsic.
 def LLVM_vscale : LLVM_IntrOp<"vscale", [0], [], [], 1>;
 
@@ -1811,6 +1815,7 @@ def LLVM_vector_extract
   }];
 }
 
+/// Interleave2
 def LLVM_vector_interleave2
     : LLVM_OneResultIntrOp<"vector.interleave2",
         /*overloadedResults=*/[0], /*overloadedOperands=*/[],
@@ -1825,12 +1830,23 @@ def LLVM_vector_interleave2
         ]>,
         Arguments<(ins LLVM_AnyVector:$vec1, LLVM_AnyVector:$vec2)>;
 
+/// Deinterleave2
 def LLVM_vector_deinterleave2
     : LLVM_OneResultIntrOp<"vector.deinterleave2",
         /*overloadedResults=*/[], /*overloadedOperands=*/[0],
         /*traits=*/[Pure]>,
         Arguments<(ins LLVM_AnyVector:$vec)>;
 
+/// Repeat
+def LLVM_vector_repeat
+    : LLVM_OneResultIntrOp<"vector.repeat",
+        /*overloadedResults=*/[0], /*overloadedOperands=*/[0],
+        /*traits=*/[Pure]>,
+        Arguments<(ins LLVM_AnyVector:$vec)> {
+  let assemblyFormat = "`(` operands `)` attr-dict `:` "
+                       "functional-type(operands, results)";
+}
+
 //
 // LLVM Vector Predication operations.
 //
diff --git a/mlir/test/Target/LLVMIR/Import/intrinsic.ll b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
index f5d4cc9a113c59..2a541bf1556154 100644
--- a/mlir/test/Target/LLVMIR/Import/intrinsic.ll
+++ b/mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -1124,6 +1124,13 @@ define void @vector_deinterleave2(<4 x double> %0, <vscale x 8 x i32> %1) {
   ret void
 }
 
+; CHECK-LABEL: llvm.func @vector_repeat
+define void @vector_repeat(<4 x float> %0) {
+  ; CHECK: llvm.intr.vector.repeat(%{{.*}}) : (vector<4xf32>) -> vector<[4]xf32>
+  %4 = call <vscale x 4 x float> @llvm.vector.repeat.nxv4f32.v4f32(<4 x float> %0);
+  ret void
+}
+
 ; CHECK-LABEL:  llvm.func @vector_predication_intrinsics
 define void @vector_predication_intrinsics(<8 x i32> %0, <8 x i32> %1, <8 x float> %2, <8 x float> %3, <8 x i64> %4, <8 x double> %5, <8 x ptr> %6, i32 %7, float %8, ptr %9, ptr %10, <8 x i1> %11, i32 %12) {
   ; CHECK: llvm.add %{{.*}}, %{{.*}} : vector<8xi32>
@@ -2063,6 +2070,9 @@ declare ptr @llvm.ptrmask.p0.i64(ptr, i64)
 declare <8 x ptr> @llvm.ptrmask.v8p0.v8i64(<8 x ptr>, <8 x i64>)
 declare <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float>, <4 x float>, i64)
 declare <4 x float> @llvm.vector.extract.v4f32.nxv4f32(<vscale x 4 x float>, i64)
+declare { <2 x double>, <2 x double> } @llvm.vector.deinterleave2.v4f64(<4 x double>)
+declare { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32>)
+declare <vscale x 4 x float> @llvm.vector.repeat.nxv4f32.v4f32(<4 x float>)
 declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
 declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)
 declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
index 865aa620031940..00755c1627725c 100644
--- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
@@ -1246,6 +1246,13 @@ llvm.func @vector_deinterleave2(%vec1: vector<4xf64>, %vec2: vector<[8]xi32>) {
   llvm.return
 }
 
+// CHECK-LABEL: @vector_repeat
+llvm.func @vector_repeat(%src: vector<4xf32>) {
+  // CHECK:  call <vscale x 4 x float> @llvm.vector.repeat.nxv4f32.v4f32
+  %0 = llvm.intr.vector.repeat (%src) : (vector<4xf32>) -> vector<[4]xf32>
+  llvm.return
+}
+
 // CHECK-LABEL: @lifetime
 llvm.func @lifetime() {
   %c = llvm.mlir.constant(16 : i64) : i64
@@ -2198,6 +2205,7 @@ llvm.func @vector_scmp(%a: vector<4 x i32>, %b: vector<4 x i32>) -> vector<4 x i
 // CHECK-DAG: declare <2 x i32> @llvm.vector.extract.v2i32.v8i32(<8 x i32>, i64 immarg)
 // CHECK-DAG: declare { <2 x double>, <2 x double> } @llvm.vector.deinterleave2.v4f64(<4 x double>)
 // CHECK-DAG: declare { <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.vector.deinterleave2.nxv8i32(<vscale x 8 x i32>)
+// CHECK-DAG: declare <vscale x 4 x float> @llvm.vector.repeat.nxv4f32.v4f32(<4 x float>)
 // CHECK-DAG: declare void @llvm.lifetime.start.p0(ptr captures(none))
 // CHECK-DAG: declare void @llvm.lifetime.end.p0(ptr captures(none))
 // CHECK-DAG: declare ptr @llvm.invariant.start.p0(i64 immarg, ptr captures(none))

``````````

</details>


https://github.com/llvm/llvm-project/pull/236453