[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Implement AsyncMark Stages (PR #220442)

[Ryan Mitchell]

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@@ -109,10 +116,46 @@ void AMDGPUMIRFormatter::printSWaitLoadcntDscntImm(uint64_t Imm,
     OS << AllOff;
 }
 
+void AMDGPUMIRFormatter::printAsyncStageMaskImm(int64_t Imm,
+                                                raw_ostream &OS) const {
+  if (!AMDGPU::isValidAsyncStageMask(Imm)) {
+    OS << Imm;
+    return;
+  }
+
+  OS << AsyncStageImmPrefix;
+  auto Mask = static_cast<AMDGPU::AsyncStages>(Imm);
+  // The zero mask names every stage. Spell that out rather than printing an
+  // empty list. The saturated mask means the same thing but is a different
+  // immediate, so it keeps its spelled-out list to stay round-trippable.
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RyanRio wrote:

Yes 😄 

https://github.com/llvm/llvm-project/pull/220442