[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Add sched_vgpr/sgpr/agpr intrinsics for GPR register hints (PR #233773)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Mon Oct 26 00:04:35 PDT 2026
jli-melchior wrote:
> We need to stop adding hacks like this. It's a huge maintenance burden and majorly detracts from efforts making fundamental scheduler improvements
Hi @arsenm thanks for review :)
Yes I agree with you that fundamental scheduler improvements are absolutely the right long-term direction, but these improvements may take a long development time i think, while kernel authors and product teams have performance targets to deliver. In production Moe kernels, controlling register placement yields >10% performance gains. And also by analyzing the patterns that users apply in practice may help us identify what the scheduler should learn to do automatically ? Could we accept the intrinsic as a transitional mechanism while simultaneously investing in fundamental scheduler improvements?
https://github.com/llvm/llvm-project/pull/233773
More information about the Mlir-commits
mailing list