[Mlir-commits] [mlir] [mlir][gpu] Split target-specific passes out of MLIRGPUTransforms (PR #234903)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Fri Oct 23 03:31:33 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Markus Böck (zero9178)
<details>
<summary>Changes</summary>
MLIRGPUTransforms linked every GPU target: the AMDGPU, LLVM, ROCDL and XeVM dialects, plus MLIRNVVMTarget, MLIRROCDLTarget, MLIRSPIRVTarget and MLIRExecutionEngineUtils. So any user of any target-specific or target-independent GPU pass also pulled in every target's dialect and serialization library.
Move the target-specific passes and patterns into one library per target. Each has its own Passes.td and Passes.h and links only its own target dialect.
MLIRGPUTransforms no longer has any target dependencies at all.
---
Patch is 81.55 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/234903.diff
46 Files Affected:
- (modified) mlir/docs/Passes.md (+16)
- (modified) mlir/docs/ReleaseNotes.md (+18)
- (modified) mlir/include/mlir-c/Dialect/GPU.h (+4)
- (modified) mlir/include/mlir/Dialect/GPU/Transforms/CMakeLists.txt (+5)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/NVVM/CMakeLists.txt (+7)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.h (+30)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.td (+68)
- (modified) mlir/include/mlir/Dialect/GPU/Transforms/Passes.h (-19)
- (modified) mlir/include/mlir/Dialect/GPU/Transforms/Passes.td (-201)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/CMakeLists.txt (+7)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/Passes.h (+50)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/Passes.td (+83)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/SPIRV/CMakeLists.txt (+7)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/SPIRV/Passes.h (+30)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/SPIRV/Passes.td (+58)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/XeVM/CMakeLists.txt (+7)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/XeVM/Passes.h (+30)
- (added) mlir/include/mlir/Dialect/GPU/Transforms/XeVM/Passes.td (+49)
- (modified) mlir/include/mlir/Dialect/GPU/Utils/GPUUtils.h (+13)
- (modified) mlir/lib/Bindings/Python/GPUPasses.cpp (+4)
- (modified) mlir/lib/CAPI/Dialect/CMakeLists.txt (+8)
- (modified) mlir/lib/CAPI/Dialect/GPUPasses.cpp (+12)
- (modified) mlir/lib/Conversion/GPUToROCDL/CMakeLists.txt (+1)
- (modified) mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp (+1)
- (modified) mlir/lib/Dialect/GPU/CMakeLists.txt (+73-12)
- (modified) mlir/lib/Dialect/GPU/Pipelines/CMakeLists.txt (+4)
- (modified) mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp (+1)
- (modified) mlir/lib/Dialect/GPU/Pipelines/GPUToROCDLPipeline.cpp (+1)
- (modified) mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp (+1)
- (modified) mlir/lib/Dialect/GPU/TransformOps/CMakeLists.txt (+1)
- (modified) mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp (+1)
- (renamed) mlir/lib/Dialect/GPU/Transforms/NVVM/NVVMAttachTarget.cpp (+2-3)
- (renamed) mlir/lib/Dialect/GPU/Transforms/ROCDL/PromoteShuffleToAMDGPU.cpp (+1-1)
- (renamed) mlir/lib/Dialect/GPU/Transforms/ROCDL/ROCDLAttachTarget.cpp (+2-3)
- (added) mlir/lib/Dialect/GPU/Transforms/ROCDL/SubgroupReduceToDPP.cpp (+238)
- (renamed) mlir/lib/Dialect/GPU/Transforms/SPIRV/SPIRVAttachTarget.cpp (+2-3)
- (modified) mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp (+3-245)
- (renamed) mlir/lib/Dialect/GPU/Transforms/XeVM/XeVMAttachTarget.cpp (+2-3)
- (modified) mlir/lib/Dialect/GPU/Utils/Utils.cpp (+25)
- (modified) mlir/lib/Dialect/SparseTensor/Pipelines/CMakeLists.txt (+1)
- (modified) mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp (+1)
- (modified) mlir/lib/RegisterAllPasses.cpp (+8)
- (modified) mlir/test/lib/Dialect/GPU/CMakeLists.txt (+1)
- (modified) mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp (+1)
- (modified) mlir/test/lib/Pass/CMakeLists.txt (+1)
- (modified) mlir/test/lib/Pass/TestVulkanRunnerPipeline.cpp (+1)
``````````diff
diff --git a/mlir/docs/Passes.md b/mlir/docs/Passes.md
index 9e70da8a3ec978..7ef03285a7ef6f 100644
--- a/mlir/docs/Passes.md
+++ b/mlir/docs/Passes.md
@@ -56,6 +56,22 @@ This document describes the available MLIR passes and their contracts.
[include "GPUPasses.md"]
+### NVVM-specific 'gpu' Dialect Passes
+
+[include "GPUNVVMPasses.md"]
+
+### ROCDL-specific 'gpu' Dialect Passes
+
+[include "GPUROCDLPasses.md"]
+
+### SPIR-V-specific 'gpu' Dialect Passes
+
+[include "GPUSPIRVPasses.md"]
+
+### XeVM-specific 'gpu' Dialect Passes
+
+[include "GPUXeVMPasses.md"]
+
## 'linalg' Dialect Passes
[include "LinalgPasses.md"]
diff --git a/mlir/docs/ReleaseNotes.md b/mlir/docs/ReleaseNotes.md
index 24a4a5f1b6ddd4..f57642308f4528 100644
--- a/mlir/docs/ReleaseNotes.md
+++ b/mlir/docs/ReleaseNotes.md
@@ -55,6 +55,24 @@ default rules, `attr-dict` contains only discardable attributes. See
manually setting a triple/chipset/features combination is a low-level
operation that should require a manual `rocdl-attach-target` call.
+### Target-Independent GPU Transforms
+
+`MLIRGPUTransforms` no longer links any target dialect or target library. The
+target-specific GPU passes and patterns moved into per-target libraries with
+their own pass headers; pass names and options are unchanged:
+
+| Library | Header | Contents |
+| --- | --- | --- |
+| `MLIRGPUNVVMTransforms` | `mlir/Dialect/GPU/Transforms/NVVM/Passes.h` | `nvvm-attach-target` |
+| `MLIRGPUROCDLTransforms` | `mlir/Dialect/GPU/Transforms/ROCDL/Passes.h` | `rocdl-attach-target`, `populateGpuPromoteShuffleToAMDGPUPatterns`, `populateGpuLowerSubgroupReduceToDPPPatterns`, `populateGpuLowerClusteredSubgroupReduceToDPPPatterns` |
+| `MLIRGPUSPIRVTransforms` | `mlir/Dialect/GPU/Transforms/SPIRV/Passes.h` | `spirv-attach-target` |
+| `MLIRGPUXeVMTransforms` | `mlir/Dialect/GPU/Transforms/XeVM/Passes.h` | `xevm-attach-target` |
+
+Each header provides its own registration function (for example
+`registerGPUNVVMPasses()`). The C API functions for these passes are renamed
+to match, e.g. `mlirCreateGPUGpuNVVMAttachTarget` is now
+`mlirCreateGPUNVVMGpuNVVMAttachTarget`.
+
## LLVM 21
### GPU/NVVM Changes
diff --git a/mlir/include/mlir-c/Dialect/GPU.h b/mlir/include/mlir-c/Dialect/GPU.h
index f87ac9924d355f..bc8d1dfc72f701 100644
--- a/mlir/include/mlir-c/Dialect/GPU.h
+++ b/mlir/include/mlir-c/Dialect/GPU.h
@@ -72,5 +72,9 @@ mlirGPUObjectAttrGetKernels(MlirAttribute mlirObjectAttr);
#endif
#include "mlir/Dialect/GPU/Transforms/Passes.capi.h.inc"
+#include "mlir/Dialect/GPU/Transforms/NVVM/Passes.capi.h.inc"
+#include "mlir/Dialect/GPU/Transforms/ROCDL/Passes.capi.h.inc"
+#include "mlir/Dialect/GPU/Transforms/SPIRV/Passes.capi.h.inc"
+#include "mlir/Dialect/GPU/Transforms/XeVM/Passes.capi.h.inc"
#endif // MLIR_C_DIALECT_GPU_H
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/CMakeLists.txt b/mlir/include/mlir/Dialect/GPU/Transforms/CMakeLists.txt
index 7cc5eb0bf9bc16..006ca6eea83475 100644
--- a/mlir/include/mlir/Dialect/GPU/Transforms/CMakeLists.txt
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/CMakeLists.txt
@@ -5,3 +5,8 @@ mlir_tablegen(Passes.capi.cpp.inc -gen-pass-capi-impl --prefix GPU)
add_mlir_dialect_tablegen_target(MLIRGPUPassIncGen)
add_mlir_doc(Passes GPUPasses ./ -gen-pass-doc)
+
+add_subdirectory(NVVM)
+add_subdirectory(ROCDL)
+add_subdirectory(SPIRV)
+add_subdirectory(XeVM)
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/CMakeLists.txt b/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/CMakeLists.txt
new file mode 100644
index 00000000000000..4053e16db43811
--- /dev/null
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/CMakeLists.txt
@@ -0,0 +1,7 @@
+set(LLVM_TARGET_DEFINITIONS Passes.td)
+mlir_tablegen(Passes.h.inc -gen-pass-decls -name GPUNVVM)
+mlir_tablegen(Passes.capi.h.inc -gen-pass-capi-header --prefix GPUNVVM)
+mlir_tablegen(Passes.capi.cpp.inc -gen-pass-capi-impl --prefix GPUNVVM)
+add_mlir_dialect_tablegen_target(MLIRGPUNVVMPassIncGen)
+
+add_mlir_doc(Passes GPUNVVMPasses ./ -gen-pass-doc)
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.h b/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.h
new file mode 100644
index 00000000000000..0c79b7b03191fb
--- /dev/null
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.h
@@ -0,0 +1,30 @@
+//===- Passes.h - GPU NVVM pass entrypoints ---------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This header file defines prototypes of the NVVM-specific GPU passes and
+// patterns.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_DIALECT_GPU_TRANSFORMS_NVVM_PASSES_H_
+#define MLIR_DIALECT_GPU_TRANSFORMS_NVVM_PASSES_H_
+
+#include "mlir/Pass/Pass.h"
+
+namespace mlir {
+
+#define GEN_PASS_DECL
+#include "mlir/Dialect/GPU/Transforms/NVVM/Passes.h.inc"
+
+/// Generate the code for registering passes.
+#define GEN_PASS_REGISTRATION
+#include "mlir/Dialect/GPU/Transforms/NVVM/Passes.h.inc"
+
+} // namespace mlir
+
+#endif // MLIR_DIALECT_GPU_TRANSFORMS_NVVM_PASSES_H_
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.td b/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.td
new file mode 100644
index 00000000000000..3e685ae098d995
--- /dev/null
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/NVVM/Passes.td
@@ -0,0 +1,68 @@
+//===-- Passes.td - GPU NVVM pass definition file ----------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_DIALECT_GPU_TRANSFORMS_NVVM_PASSES
+#define MLIR_DIALECT_GPU_TRANSFORMS_NVVM_PASSES
+
+include "mlir/Pass/PassBase.td"
+
+def GpuNVVMAttachTarget: Pass<"nvvm-attach-target", ""> {
+ let summary = "Attaches an NVVM target attribute to a GPU Module.";
+ let description = [{
+ This pass searches for all GPU Modules in the immediate regions and attaches
+ an NVVM target if the module matches the name specified by the `module` argument.
+
+ Example:
+ ```
+ // File: in.mlir:
+ gpu.module @nvvm_module_1 {...}
+ gpu.module @nvvm_module_2 {...}
+ gpu.module @rocdl_module_1 {...}
+ // mlir-opt --nvvm-attach-target="module=nvvm.* chip=sm_90" in.mlir
+ gpu.module @nvvm_module_1 [#nvvm.target<chip = "sm_90">] {...}
+ gpu.module @nvvm_module_2 [#nvvm.target<chip = "sm_90">] {...}
+ gpu.module @rocdl_module_1 {...}
+ ```
+ }];
+ let options = [
+ Option<"moduleMatcher", "module", "std::string",
+ /*default=*/ [{""}],
+ "Regex used to identify the modules to attach the target to.">,
+ Option<"triple", "triple", "std::string",
+ /*default=*/ "\"nvptx64-nvidia-cuda\"",
+ "Target triple.">,
+ Option<"chip", "chip", "std::string",
+ /*default=*/"\"sm_75\"",
+ "Target chip.">,
+ Option<"features", "features", "std::string",
+ /*default=*/"\"\"",
+ "Target features.">,
+ Option<"optLevel", "O", "unsigned",
+ /*default=*/"2",
+ "Optimization level.">,
+ Option<"fastFlag", "fast", "bool",
+ /*default=*/"false",
+ "Enable fast math mode.">,
+ Option<"ftzFlag", "ftz", "bool",
+ /*default=*/"false",
+ "Enable flush to zero for denormals.">,
+ Option<"compilerDiagnosticsFlag", "collect-compiler-diagnostics", "bool",
+ /*default=*/"false",
+ "Enable collection of compiler diagnostics.">,
+ ListOption<"linkLibs", "l", "std::string",
+ "Extra bitcode libraries paths to link to.">,
+ Option<"cmdOptions", "ptxas-cmd-options", "std::string",
+ /*default=*/ [{""}],
+ "Command line options passed to downstream compiler">,
+ Option<"verifyTarget", "verify-target-arch", "bool",
+ /*default=*/"true",
+ "Enable verification of the target architecture">,
+ ];
+}
+
+#endif // MLIR_DIALECT_GPU_TRANSFORMS_NVVM_PASSES
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/Passes.h b/mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
index 6657ff819dea5c..509d096d765a04 100644
--- a/mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
@@ -15,10 +15,8 @@
#include "mlir/Dialect/GPU/IR/GPUDialect.h"
#include "mlir/Dialect/GPU/Utils/GPUUtils.h"
-#include "mlir/Dialect/LLVMIR/ROCDLTargetInfo.h"
#include "mlir/IR/PatternMatch.h"
#include "mlir/Pass/Pass.h"
-#include <optional>
namespace llvm {
class TargetMachine;
@@ -73,19 +71,6 @@ void populateGpuLowerClusteredSubgroupReduceToShufflePatterns(
RewritePatternSet &patterns, unsigned subgroupSize,
unsigned shuffleBitwidth = 32, PatternBenefit benefit = 1);
-/// Collect a set of patterns to lower `gpu.subgroup_reduce` into `amdgpu.dpp`
-/// ops over scalar types. Assumes that the subgroup has
-/// `subgroupSize` lanes. Applicable only to AMD GPUs.
-void populateGpuLowerSubgroupReduceToDPPPatterns(
- RewritePatternSet &patterns, unsigned subgroupSize,
- const ROCDL::TargetInfo &target, PatternBenefit benefit = 1);
-
-/// Disjoint counterpart of `populateGpuLowerSubgroupReduceToDPPPatterns`
-/// that only matches `gpu.subgroup_reduce` ops with a `cluster_size`.
-void populateGpuLowerClusteredSubgroupReduceToDPPPatterns(
- RewritePatternSet &patterns, unsigned subgroupSize,
- const ROCDL::TargetInfo &target, PatternBenefit benefit = 1);
-
/// Collect all patterns to rewrite ops within the GPU dialect.
inline void populateGpuRewritePatterns(RewritePatternSet &patterns) {
populateGpuAllReducePatterns(patterns);
@@ -112,10 +97,6 @@ void populateGpuDecomposeMemrefsPatterns(RewritePatternSet &patterns);
/// Erase barriers that do not enforce conflicting memory side effects.
void populateGpuEliminateBarriersPatterns(RewritePatternSet &patterns);
-/// Tries to promote `gpu.shuffle`s to specialized AMDGPU intrinsics.
-void populateGpuPromoteShuffleToAMDGPUPatterns(
- RewritePatternSet &patterns, std::optional<ROCDL::TargetInfo> target);
-
/// Generate the code for registering passes.
#define GEN_PASS_REGISTRATION
#include "mlir/Dialect/GPU/Transforms/Passes.h.inc"
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td b/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
index 090bfdba3ce8f5..b67caaadaf4ddb 100644
--- a/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
@@ -115,205 +115,4 @@ def GpuModuleToBinaryPass
];
}
-def GpuNVVMAttachTarget: Pass<"nvvm-attach-target", ""> {
- let summary = "Attaches an NVVM target attribute to a GPU Module.";
- let description = [{
- This pass searches for all GPU Modules in the immediate regions and attaches
- an NVVM target if the module matches the name specified by the `module` argument.
-
- Example:
- ```
- // File: in.mlir:
- gpu.module @nvvm_module_1 {...}
- gpu.module @nvvm_module_2 {...}
- gpu.module @rocdl_module_1 {...}
- // mlir-opt --nvvm-attach-target="module=nvvm.* chip=sm_90" in.mlir
- gpu.module @nvvm_module_1 [#nvvm.target<chip = "sm_90">] {...}
- gpu.module @nvvm_module_2 [#nvvm.target<chip = "sm_90">] {...}
- gpu.module @rocdl_module_1 {...}
- ```
- }];
- let options = [
- Option<"moduleMatcher", "module", "std::string",
- /*default=*/ [{""}],
- "Regex used to identify the modules to attach the target to.">,
- Option<"triple", "triple", "std::string",
- /*default=*/ "\"nvptx64-nvidia-cuda\"",
- "Target triple.">,
- Option<"chip", "chip", "std::string",
- /*default=*/"\"sm_75\"",
- "Target chip.">,
- Option<"features", "features", "std::string",
- /*default=*/"\"\"",
- "Target features.">,
- Option<"optLevel", "O", "unsigned",
- /*default=*/"2",
- "Optimization level.">,
- Option<"fastFlag", "fast", "bool",
- /*default=*/"false",
- "Enable fast math mode.">,
- Option<"ftzFlag", "ftz", "bool",
- /*default=*/"false",
- "Enable flush to zero for denormals.">,
- Option<"compilerDiagnosticsFlag", "collect-compiler-diagnostics", "bool",
- /*default=*/"false",
- "Enable collection of compiler diagnostics.">,
- ListOption<"linkLibs", "l", "std::string",
- "Extra bitcode libraries paths to link to.">,
- Option<"cmdOptions", "ptxas-cmd-options", "std::string",
- /*default=*/ [{""}],
- "Command line options passed to downstream compiler">,
- Option<"verifyTarget", "verify-target-arch", "bool",
- /*default=*/"true",
- "Enable verification of the target architecture">,
- ];
-}
-
-def GpuROCDLAttachTarget: Pass<"rocdl-attach-target", ""> {
- let summary = "Attaches a ROCDL target attribute to a GPU Module.";
- let description = [{
- This pass searches for all GPU Modules in the immediate regions and attaches
- a ROCDL target if the module matches the name specified by the `module` argument.
-
- Example:
- ```
- // File: in.mlir:
- gpu.module @nvvm_module_1 {...}
- gpu.module @nvvm_module_2 {...}
- gpu.module @rocdl_module_1 {...}
- // mlir-opt --nvvm-attach-target="module=rocdl.* chip=gfx90a" in.mlir
- gpu.module @nvvm_module_1 {...}
- gpu.module @nvvm_module_2 {...}
- gpu.module @rocdl_module_1 [#rocdl.target<chip = "gfx90a">] {...}
- ```
- }];
- let options = [
- Option<"moduleMatcher", "module", "std::string",
- /*default=*/ [{""}],
- "Regex used to identify the modules to attach the target to.">,
- Option<"arch", "arch", "std::string",
- /*default=*/"\"\"",
- "Target architecture, in the spelling the conversion passes take "
- "(e.g. gfx942, gfx90a:xnack+, amdgpu9.4-amd-amdhsa, "
- "amdgcn-amd-amdhsa--gfx90a:xnack-). "
- "When non-empty this supersedes 'triple' and 'chip', and its "
- "target-ID modifiers become the module's 'rocdl.xnack' and "
- "'rocdl.sramecc' attributes rather than target features.">,
- Option<"triple", "triple", "std::string",
- /*default=*/ "\"amdgcn-amd-amdhsa\"",
- "Target triple. Ignored when 'arch' is given.">,
- Option<"chip", "chip", "std::string",
- /*default=*/"\"gfx900\"",
- "Target chip. Ignored when 'arch' is given.">,
- Option<"features", "features", "std::string",
- /*default=*/"\"\"",
- "Target features.">,
- Option<"abiVersion", "abi", "std::string",
- /*default=*/"\"600\"",
- "ABI version.">,
- Option<"optLevel", "O", "unsigned",
- /*default=*/"2",
- "Optimization level.">,
- Option<"waveSize", "wavesize", "unsigned",
- /*default=*/"0",
- "Wavefront size (32 or 64). 0 takes the size from the target when "
- "'arch' is given, and Wave64 otherwise.">,
- Option<"fastFlag", "fast", "bool",
- /*default=*/"false",
- "Enable fast relaxed math opt.">,
- Option<"dazFlag", "daz", "bool",
- /*default=*/"false",
- "Enable denormals are zero opt.">,
- Option<"finiteOnlyFlag", "finite-only", "bool",
- /*default=*/"false",
- "Enable finite only opt.">,
- Option<"unsafeMathFlag", "unsafe-math", "bool",
- /*default=*/"false",
- "Enable unsafe math opt.">,
- Option<"correctSqrtFlag", "correct-sqrt", "bool",
- /*default=*/"true",
- "Enable correct rounded sqrt.">,
- ListOption<"linkLibs", "l", "std::string",
- "Extra bitcode libraries paths to link to.">,
- ];
-}
-
-def GpuSPIRVAttachTarget: Pass<"spirv-attach-target", ""> {
- let summary = "Attaches an SPIR-V target attribute to a GPU Module.";
- let description = [{
- This pass searches for all GPU Modules in the immediate regions and attaches
- an SPIR-V target if the module matches the name specified by the `module` argument.
-
- Example:
- ```
- // Given the following file: in1.mlir:
- gpu.module @nvvm_module_1 {...}
- gpu.module @spirv_module_1 {...}
- // With
- // mlir-opt --spirv-attach-target="module=spirv.* ver=v1.0 caps=Kernel" in1.mlir
- // it will generate,
- gpu.module @nvvm_module_1 {...}
- gpu.module @spirv_module_1 [#spirv.target<#spirv.vce<v1.0, [Kernel], []>, #spirv.resource_limits<>>] {...}
- ```
- }];
- let options = [
- Option<"moduleMatcher", "module", "std::string",
- /*default=*/ [{""}],
- "Regex used to identify the modules to attach the target to.">,
- Option<"spirvVersion", "ver", "std::string",
- /*default=*/ "\"v1.0\"",
- "SPIR-V Version.">,
- ListOption<"spirvCapabilities", "caps", "std::string",
- "List of supported SPIR-V Capabilities">,
- ListOption<"spirvExtensions", "exts", "std::string",
- "List of supported SPIR-V Extensions">,
- Option<"clientApi", "client_api", "std::string",
- /*default=*/ "\"Unknown\"",
- "Client API">,
- Option<"deviceVendor", "vendor", "std::string",
- /*default=*/ "\"Unknown\"",
- "Device Vendor">,
- Option<"deviceType", "device_type", "std::string",
- /*default=*/ "\"Unknown\"",
- "Device Type">,
- Option<"deviceId", "device_id", "uint32_t",
- /*default=*/ "",
- "Device ID">,
- ];
-}
-
-def GpuXeVMAttachTarget : Pass<"xevm-attach-target", ""> {
- let summary = "Attaches a XeVM target attribute to a GPU Module.";
- let description = [{
- This pass searches for all GPU Modules in the immediate regions and attaches
- a XeVM target if the module matches the name specified by the `module` argument.
-
- Example:
- ```
- // File: in.mlir:
- gpu.module @nvvm_module_1 {...}
- gpu.module @rocdl_module_2 {...}
- gpu.module @xevm_module_3 {...}
- // mlir-opt --xevm-attach-target="module=xevm.* chip=pvc" in.mlir
- gpu.module @nvvm_module_1 {...}
- gpu.module @rocdl_module_2 {...}
- gpu.module @xevm_module_3 [#xevm.target<chip = "pvc">] {...}
- ```
- }];
- let options =
- [Option<"moduleMatcher", "module", "std::string",
- /*default=*/[{""}],
- "Regex used to identify the modules to attach the target to.">,
- Option<"triple", "triple", "std::string",
- /*default=*/"\"spirv64-unknown-unknown\"", "Target triple.">,
- Option<"chip", "chip", "std::string",
- /*default=*/"\"bmg\"", "Target chip.">,
- Option<"optLevel", "O", "unsigned",
- /*default=*/"2", "Optimization level.">,
- ListOption<"linkLibs", "l", "std::string",
- "Extra bitcode libraries paths to link to.">,
- Option<"cmdOptions", "cmd-options", "std::string",
- /*default=*/[{""}],
- "Command line options passed to downstream compiler">];
-}
#endif // MLIR_DIALECT_GPU_PASSES
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/CMakeLists.txt b/mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/CMakeLists.txt
new file mode 100644
index 00000000000000..1d023895aa23af
--- /dev/null
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/CMakeLists.txt
@@ -0,0 +1,7 @@
+set(LLVM_TARGET_DEFINITIONS Passes.td)
+mlir_tablegen(Passes.h.inc -gen-pass-decls -name GPUROCDL)
+mlir_tablegen(Passes.capi.h.inc -gen-pass-capi-header --prefix GPUROCDL)
+mlir_tablegen(Passes.capi.cpp.inc -gen-pass-capi-impl --prefix GPUROCDL)
+add_mlir_dialect_tablegen_target(MLIRGPUROCDLPassIncGen)
+
+add_mlir_doc(Passes GPUROCDLPasses ./ -gen-pass-doc)
diff --git a/mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/Passes.h b/mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/Passes.h
new file mode 100644
index 00000000000000..a3e596580a8019
--- /dev/null
+++ b/mlir/include/mlir/Dialect/GPU/Transforms/ROCDL/Passes.h
@@ -0,0 +1,50 @@
+//===- Passes.h - GPU ROCDL pass entrypoints -----------------...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/234903
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