[Mlir-commits] [mlir] [MLIR][NVVM] Support sp{de}compress MLIR Ops (PR #232731)
Kirill Vedernikov
llvmlistbot at llvm.org
Thu Oct 22 03:23:04 PDT 2026
https://github.com/kvederni updated https://github.com/llvm/llvm-project/pull/232731
>From 0b0d1f822fd71028e4679b8502b264db8f2cf46a Mon Sep 17 00:00:00 2001
From: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: Fri, 16 Oct 2026 12:05:14 +0200
Subject: [PATCH 1/4] [MLIR][NVVM] Support sp{de}compress MLIR Ops
---
mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 276 +++++++++++
mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 145 ++++++
.../LLVMIR/nvvm/spcompress-invalid.mlir | 80 ++++
.../Target/LLVMIR/nvvm/spcompress-sp2to4.mlir | 449 ++++++++++++++++++
.../LLVMIR/nvvm/spdecompress-invalid.mlir | 110 +++++
.../LLVMIR/nvvm/spdecompress-sp1to16.mlir | 158 ++++++
.../LLVMIR/nvvm/spdecompress-sp1to2.mlir | 369 ++++++++++++++
.../LLVMIR/nvvm/spdecompress-sp1to4.mlir | 399 ++++++++++++++++
.../LLVMIR/nvvm/spdecompress-sp1to8.mlir | 186 ++++++++
.../LLVMIR/nvvm/spdecompress-sp2to16.mlir | 156 ++++++
.../LLVMIR/nvvm/spdecompress-sp2to4.mlir | 395 +++++++++++++++
.../LLVMIR/nvvm/spdecompress-sp2to8.mlir | 184 +++++++
.../LLVMIR/nvvm/spdecompress-sp4to16.mlir | 85 ++++
.../LLVMIR/nvvm/spdecompress-sp4to8.mlir | 99 ++++
14 files changed, 3091 insertions(+)
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
create mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index 79eda3fee335cc..230cdd18fc8eb9 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -7200,6 +7200,282 @@ def NVVM_Tcgen05MMABlockScaleDecompressBOp :
}];
}
+//===----------------------------------------------------------------------===//
+// NVVM spcompress and spdecompress Ops
+//===----------------------------------------------------------------------===//
+
+// Structured sparsity factor: spXtoY keeps X out of every Y elements.
+def SPFactor1To2 : I32EnumAttrCase<"SP1TO2", 0, "sp1to2">;
+def SPFactor1To4 : I32EnumAttrCase<"SP1TO4", 1, "sp1to4">;
+def SPFactor1To8 : I32EnumAttrCase<"SP1TO8", 2, "sp1to8">;
+def SPFactor1To16 : I32EnumAttrCase<"SP1TO16", 3, "sp1to16">;
+def SPFactor2To4 : I32EnumAttrCase<"SP2TO4", 4, "sp2to4">;
+def SPFactor2To8 : I32EnumAttrCase<"SP2TO8", 5, "sp2to8">;
+def SPFactor2To16 : I32EnumAttrCase<"SP2TO16", 6, "sp2to16">;
+def SPFactor4To8 : I32EnumAttrCase<"SP4TO8", 7, "sp4to8">;
+def SPFactor4To16 : I32EnumAttrCase<"SP4TO16", 8, "sp4to16">;
+def SPFactor : I32EnumAttr<"SPFactor", "Structured sparsity factor", [
+ SPFactor1To2,
+ SPFactor1To4,
+ SPFactor1To8,
+ SPFactor1To16,
+ SPFactor2To4,
+ SPFactor2To8,
+ SPFactor2To16,
+ SPFactor4To8,
+ SPFactor4To16,
+ ]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::NVVM";
+}
+def SPFactorAttr : EnumAttr<NVVM_Dialect, SPFactor, "sp_factor">;
+
+// Structured sparsity metadata index size
+def SPIndexSizeB2 : I32EnumAttrCase<"B2", 2, "b2">;
+def SPIndexSizeB4 : I32EnumAttrCase<"B4", 4, "b4">;
+def SPIndexSize : I32EnumAttr<"SPIndexSize",
+ "Structured sparsity metadata index size", [
+ SPIndexSizeB2,
+ SPIndexSizeB4,
+ ]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::NVVM";
+}
+def SPIndexSizeAttr : EnumAttr<NVVM_Dialect, SPIndexSize, "sp_index_size">;
+
+// Structured sparsity element size
+def SPElemSizeB8 : I32EnumAttrCase<"B8", 8, "b8">;
+def SPElemSizeB16 : I32EnumAttrCase<"B16", 16, "b16">;
+def SPElemSize : I32EnumAttr<"SPElemSize", "Structured sparsity element size", [
+ SPElemSizeB8,
+ SPElemSizeB16,
+ ]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::NVVM";
+}
+def SPElemSizeAttr : EnumAttr<NVVM_Dialect, SPElemSize, "sp_elem_size">;
+
+// Structured sparsity repetition factor
+def SPRepFactorX1 : I32EnumAttrCase<"X1", 1, "x1">;
+def SPRepFactorX2 : I32EnumAttrCase<"X2", 2, "x2">;
+def SPRepFactorX4 : I32EnumAttrCase<"X4", 4, "x4">;
+def SPRepFactorX8 : I32EnumAttrCase<"X8", 8, "x8">;
+def SPRepFactorX16 : I32EnumAttrCase<"X16", 16, "x16">;
+def SPRepFactorX32 : I32EnumAttrCase<"X32", 32, "x32">;
+def SPRepFactorX64 : I32EnumAttrCase<"X64", 64, "x64">;
+def SPRepFactor : I32EnumAttr<"SPRepFactor",
+ "Structured sparsity repetition factor",
+ [SPRepFactorX1, SPRepFactorX2, SPRepFactorX4, SPRepFactorX8,
+ SPRepFactorX16, SPRepFactorX32, SPRepFactorX64]> {
+ let genSpecializedAttr = 0;
+ let cppNamespace = "::mlir::NVVM";
+}
+def SPRepFactorAttr : EnumAttr<NVVM_Dialect, SPRepFactor, "sp_rep_factor">;
+
+// spcompress only supports the 2:4 sparsity factor.
+def SPCompressFactorAttr : ConfinedAttr<SPFactorAttr, [
+ EnumAttrIsOneOf<SPFactorAttr, [
+ SPFactor2To4,
+ ]>
+ ]>;
+
+// Register bundles are i32 or fixed-length, rank-1 vectors of i32.
+defvar SPDataType = FixedVectorOfRankAndLengthAndType<[1],
+ [2, 4, 8, 16, 32, 64, 128], [I32]>;
+defvar SPRegType = AnyTypeOf<[I32,
+ FixedVectorOfRankAndLengthAndType<[1], [2, 4, 8, 16, 32, 64], [I32]>]>;
+
+def NVVM_SPCompressOp : NVVM_Op<"spcompress",
+ [Pure, NVVMRequiresSMa<[107]>]> {
+ let summary = "Compress dense vector to structured sparse vector";
+ let description = [{
+ Compresses elements from a dense vector `data` into a structured sparse
+ vector `compressed_data`. The indices of the selected elements are
+ returned in `metadata`.
+
+ All vectors are bundles of 32-bit registers. The elements are packed into
+ these registers according to `elemSize`.
+
+ Arguments:
+ - `spDesc`: Sparsity descriptor specifying the selection operation and the
+ element data type.
+ - `data`: Input dense vector of `2 * repFactor` registers containing the
+ elements to be compressed.
+ - `compFactor`: Compression factor. Only `sp2to4` is supported.
+ - `indexSize`: Size in bits of each metadata index (`b2` or `b4`).
+ - `elemSize`: Size in bits of each element in `data` (`b8` or `b16`).
+ - `repFactor`: Repeat factor of the operation (`x1` to `x64`).
+
+ Results:
+ - `metadata`: Indices of the selected elements, stored in
+ `ceil(repFactor * indexSize / elemSize)` registers.
+ - `compressed_data`: Selected elements, stored in `repFactor` registers.
+
+ Examples:
+ ```mlir
+ // 8-bit elements, 2-bit indices, repeat factor of 1.
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+
+ // 8-bit elements, 4-bit indices, repeat factor of 2.
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<2xi32>
+
+ // 16-bit elements, 4-bit indices, repeat factor of 8.
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x8
+ : i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
+ ```
+
+ [For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-spcompress)
+ }];
+
+ let arguments = (ins
+ I32:$spDesc,
+ SPDataType:$data,
+ SPCompressFactorAttr:$compFactor,
+ SPIndexSizeAttr:$indexSize,
+ SPElemSizeAttr:$elemSize,
+ SPRepFactorAttr:$repFactor);
+
+ let results = (outs
+ SPRegType:$metadata,
+ SPRegType:$compressed_data);
+
+ let assemblyFormat = [{
+ $spDesc `,` $data
+ `comp_factor` `=` enum($compFactor)
+ `index_size` `=` enum($indexSize)
+ `elem_size` `=` enum($elemSize)
+ `rep_factor` `=` enum($repFactor)
+ attr-dict `:` type(operands) `->` type($metadata) `,` type($compressed_data)
+ }];
+
+ let extraClassDeclaration = [{
+ static NVVM::IDArgPair getIntrinsicIDAndArgs(Operation &op,
+ LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder);
+ }];
+
+ let hasVerifier = 1;
+
+ string llvmBuilder = [{
+ auto [id, args] = NVVM::SPCompressOp::getIntrinsicIDAndArgs(
+ *op, moduleTranslation, builder);
+ // The intrinsic returns the compressed data with one lane per element.
+ auto *dataTy = llvm::cast<llvm::FixedVectorType>(args[0]->getType());
+ llvm::Type *compressedTy = llvm::FixedVectorType::get(
+ dataTy->getElementType(), dataTy->getNumElements() / 2);
+ llvm::Type *metadataTy = moduleTranslation.convertType(
+ op.getMetadata().getType());
+ llvm::Type *resultTy = llvm::StructType::get(
+ builder.getContext(), {metadataTy, compressedTy});
+ llvm::CallInst *result = createIntrinsicCall(builder, id, resultTy, args);
+ $metadata = builder.CreateExtractValue(result, 0);
+ $compressed_data = builder.CreateBitCast(
+ builder.CreateExtractValue(result, 1),
+ moduleTranslation.convertType(op.getCompressedData().getType()));
+ }];
+}
+
+def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
+ [Pure, NVVMRequiresSMa<[107]>]> {
+ let summary = "Decompress structured sparse vector to dense vector";
+ let description = [{
+ Decompresses elements from a structured sparse vector `compressed_data`
+ into a dense vector `data`, using the indices stored in `metadata`. Dense
+ positions not selected by `metadata` are set to zero.
+
+ All vectors are bundles of 32-bit registers. The elements are packed into
+ these registers according to `elemSize`. For a decompression factor
+ `spXtoY`, the number of registers in each bundle is:
+ - `metadata`: `ceil(X * indexSize * repFactor / 32)`
+ - `compressed_data`: `ceil(X * elemSize * repFactor / 32)`
+ - `data`: `Y * elemSize * repFactor / 32`
+
+ The following conditions must hold:
+ - `Y * elemSize * repFactor` is between 32 and 4096.
+ - `X * elemSize` is at most 32.
+ - `indexSize` is `b2` only if `Y` is at most 4.
+
+ Arguments:
+ - `metadata`: Indices of the selected elements.
+ - `compressed_data`: Compressed vector containing the selected elements.
+ - `compFactor`: Decompression factor (`sp1to2`, `sp1to4`, `sp1to8`,
+ `sp1to16`, `sp2to4`, `sp2to8`, `sp2to16`, `sp4to8`, or `sp4to16`).
+ - `indexSize`: Size in bits of each metadata index (`b2` or `b4`).
+ - `elemSize`: Size in bits of each element (`b8` or `b16`).
+ - `repFactor`: Repeat factor of the operation (`x1` to `x64`).
+
+ Results:
+ - `data`: Output dense vector containing the decompressed elements.
+
+ Examples:
+ ```mlir
+ // 8-bit elements, 2-bit indices, repeat factor of 1.
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, i32 -> i32
+
+ // 8-bit elements, 4-bit indices, repeat factor of 2.
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+
+ // 16-bit elements, 4-bit indices, repeat factor of 64.
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x64
+ : vector<16xi32>, vector<64xi32> -> vector<128xi32>
+ ```
+
+ [For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-spdecompress)
+ }];
+
+ let arguments = (ins
+ SPRegType:$metadata,
+ SPRegType:$compressed_data,
+ SPFactorAttr:$compFactor,
+ SPIndexSizeAttr:$indexSize,
+ SPElemSizeAttr:$elemSize,
+ SPRepFactorAttr:$repFactor);
+
+ let results = (outs
+ AnyTypeOf<[I32, SPDataType]>:$data);
+
+ let assemblyFormat = [{
+ $metadata `,` $compressed_data
+ `comp_factor` `=` enum($compFactor)
+ `index_size` `=` enum($indexSize)
+ `elem_size` `=` enum($elemSize)
+ `rep_factor` `=` enum($repFactor)
+ attr-dict `:` type($metadata) `,` type($compressed_data) `->` type($data)
+ }];
+
+ let extraClassDeclaration = [{
+ static NVVM::IDArgPair getIntrinsicIDAndArgs(Operation &op,
+ LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder);
+ }];
+
+ let hasVerifier = 1;
+
+ string llvmBuilder = [{
+ auto [id, args] = NVVM::SPDecompressOp::getIntrinsicIDAndArgs(
+ *op, moduleTranslation, builder);
+ // The intrinsic returns the dense data with one lane per element.
+ auto *compressedTy = llvm::cast<llvm::FixedVectorType>(args[1]->getType());
+ unsigned numTgt = llvm::cast<llvm::ConstantInt>(args[3])->getZExtValue();
+ llvm::Type *dataTy = llvm::FixedVectorType::get(
+ compressedTy->getElementType(),
+ numTgt * static_cast<unsigned>($repFactor));
+ llvm::Value *logicalData = createIntrinsicCall(builder, id, dataTy, args);
+ $data = builder.CreateBitCast(
+ logicalData, moduleTranslation.convertType(op.getData().getType()));
+ }];
+}
+
def SIMTFloatType : AnyTypeOf<[F16, BF16, F32, F64,
VectorOfLengthAndType<[2], [F16, BF16, F32, F64]>]>;
diff --git a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
index bb2db355d567f2..778e53f6dfff07 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
@@ -38,6 +38,7 @@
#include "llvm/IR/NVVMIntrinsicUtils.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/FormatVariadic.h"
+#include "llvm/Support/MathExtras.h"
#include "llvm/Support/NVPTXAddrSpace.h"
#include "llvm/Support/raw_ostream.h"
#include <array>
@@ -7069,6 +7070,150 @@ LogicalResult Tcgen05LdRedOp::verify() {
return success();
}
+//===----------------------------------------------------------------------===//
+// spcompress and spdecompress Ops
+//===----------------------------------------------------------------------===//
+
+// Returns the number of 32-bit registers in a register bundle, which is either
+// an i32 or a vector of i32.
+static unsigned getNumSPRegisters(Type type) {
+ if (auto vecTy = dyn_cast<VectorType>(type))
+ return vecTy.getNumElements();
+ return 1;
+}
+
+// Returns the {source, target} group sizes of the sparsity factor.
+static std::pair<unsigned, unsigned> getSPFactor(NVVM::SPFactor compFactor) {
+ switch (compFactor) {
+ case NVVM::SPFactor::SP1TO2:
+ return {1, 2};
+ case NVVM::SPFactor::SP1TO4:
+ return {1, 4};
+ case NVVM::SPFactor::SP1TO8:
+ return {1, 8};
+ case NVVM::SPFactor::SP1TO16:
+ return {1, 16};
+ case NVVM::SPFactor::SP2TO4:
+ return {2, 4};
+ case NVVM::SPFactor::SP2TO8:
+ return {2, 8};
+ case NVVM::SPFactor::SP2TO16:
+ return {2, 16};
+ case NVVM::SPFactor::SP4TO8:
+ return {4, 8};
+ case NVVM::SPFactor::SP4TO16:
+ return {4, 16};
+ }
+ llvm_unreachable("Invalid SPFactor");
+}
+
+LogicalResult SPCompressOp::verify() {
+ unsigned repFactor = static_cast<unsigned>(getRepFactor());
+ unsigned indexSize = static_cast<unsigned>(getIndexSize());
+ unsigned elemSize = static_cast<unsigned>(getElemSize());
+
+ if (getNumSPRegisters(getData().getType()) != 2 * repFactor)
+ return emitError(
+ "Operation attributes and provided input data size doesn't match");
+
+ if (getNumSPRegisters(getCompressedData().getType()) != repFactor)
+ return emitError("Operation attributes and provided output compressed data "
+ "size doesn't match");
+
+ if (getNumSPRegisters(getMetadata().getType()) !=
+ llvm::divideCeil(repFactor * indexSize, elemSize))
+ return emitError(
+ "Operation attributes and provided output metadata size doesn't match");
+
+ return success();
+}
+
+LogicalResult SPDecompressOp::verify() {
+ unsigned repFactor = static_cast<unsigned>(getRepFactor());
+ unsigned indexSize = static_cast<unsigned>(getIndexSize());
+ unsigned elemSize = static_cast<unsigned>(getElemSize());
+ auto [numSrc, numTgt] = getSPFactor(getCompFactor());
+
+ unsigned dataBits = numTgt * elemSize * repFactor;
+ if (dataBits < 32 || dataBits > 4096)
+ return emitError(
+ "Invalid compFactor, element size, and repeat factor combination");
+
+ if (numSrc * elemSize > 32)
+ return emitError("Invalid compFactor and element size combination");
+
+ if (indexSize == 2 && numTgt > 4)
+ return emitError("Invalid index size and target combination, target "
+ "should be at most 4 if index size is 2");
+
+ if (getNumSPRegisters(getData().getType()) != dataBits / 32)
+ return emitError(
+ "Operation attributes and provided output data size doesn't match");
+
+ if (getNumSPRegisters(getCompressedData().getType()) !=
+ llvm::divideCeil(numSrc * elemSize * repFactor, 32))
+ return emitError("Operation attributes and provided input compressed data "
+ "size doesn't match");
+
+ if (getNumSPRegisters(getMetadata().getType()) !=
+ llvm::divideCeil(numSrc * indexSize * repFactor, 32))
+ return emitError(
+ "Operation attributes and provided input metadata size doesn't match");
+
+ return success();
+}
+
+NVVM::IDArgPair
+SPCompressOp::getIntrinsicIDAndArgs(Operation &op, LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder) {
+ auto thisOp = cast<NVVM::SPCompressOp>(op);
+ unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
+ unsigned repFactor = static_cast<unsigned>(thisOp.getRepFactor());
+
+ // The intrinsic takes the dense data with one lane per element. The data
+ // occupies 2 * repFactor 32-bit registers.
+ llvm::Type *dataTy = llvm::FixedVectorType::get(builder.getIntNTy(elemSize),
+ 64 * repFactor / elemSize);
+ llvm::Value *data =
+ builder.CreateBitCast(mt.lookupValue(thisOp.getData()), dataTy);
+
+ llvm::SmallVector<llvm::Value *> args{
+ data,
+ mt.lookupValue(thisOp.getSpDesc()),
+ builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
+ // spcompress only supports the sp2to4 compression factor.
+ builder.getInt32(4),
+ };
+ return {llvm::Intrinsic::nvvm_spcompress, std::move(args)};
+}
+
+NVVM::IDArgPair SPDecompressOp::getIntrinsicIDAndArgs(
+ Operation &op, LLVM::ModuleTranslation &mt, llvm::IRBuilderBase &builder) {
+ auto thisOp = cast<NVVM::SPDecompressOp>(op);
+ auto [numSrc, numTgt] = getSPFactor(thisOp.getCompFactor());
+ unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
+ unsigned repFactor = static_cast<unsigned>(thisOp.getRepFactor());
+
+ // The intrinsic takes the compressed data with one lane per element.
+ // Compressed data narrower than 32 bits is carried in the low bits of an i32.
+ llvm::Value *compressedData = mt.lookupValue(thisOp.getCompressedData());
+ unsigned compressedBits = numSrc * elemSize * repFactor;
+ if (compressedBits < 32)
+ compressedData =
+ builder.CreateTrunc(compressedData, builder.getIntNTy(compressedBits));
+ llvm::Type *compressedTy = llvm::FixedVectorType::get(
+ builder.getIntNTy(elemSize), numSrc * repFactor);
+ compressedData = builder.CreateBitCast(compressedData, compressedTy);
+
+ llvm::SmallVector<llvm::Value *> args{
+ mt.lookupValue(thisOp.getMetadata()),
+ compressedData,
+ builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
+ builder.getInt32(numTgt),
+ };
+ return {llvm::Intrinsic::nvvm_spdecompress, std::move(args)};
+}
+
//===----------------------------------------------------------------------===//
// NVVMDialect initialization, type parsing, and registration.
//===----------------------------------------------------------------------===//
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
new file mode 100644
index 00000000000000..3eb906346a33cc
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
@@ -0,0 +1,80 @@
+// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
+
+llvm.func @spcompress_invalid_data_size(%spdesc: i32, %data: vector<2xi32>) {
+ // expected-error @below {{Operation attributes and provided input data size doesn't match}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, vector<2xi32> -> i32, vector<2xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<4xi32>) {
+ // expected-error @below {{Operation attributes and provided output compressed data size doesn't match}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<4xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<4xi32>) {
+ // expected-error @below {{Operation attributes and provided output metadata size doesn't match}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, vector<4xi32> -> vector<2xi32>, vector<2xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_elem_size(%spdesc: i32, %data: vector<2xi32>) {
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ // expected-error @below {{expected string or keyword containing one of the following enum values for attribute 'elemSize' [b8, b16]}}
+ comp_factor = sp2to4 index_size = b2 elem_size = b32 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_comp_factor(%spdesc: i32, %data: vector<2xi32>) {
+ // expected-error @below {{attribute 'compFactor' failed to satisfy constraint: Structured sparsity factor whose value is one of {sp2to4}}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_scalable_data(%spdesc: i32, %data: vector<[2]xi32>) {
+ // expected-error @below {{operand #1 must be fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, vector<[2]xi32> -> i32, i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<2xi32>) {
+ %data = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
+ // expected-error @below {{operand #1 must be fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<1x2xi32>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, vector<1x2xi32> -> i32, i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_scalable_compressed_data(%spdesc: i32, %data: vector<4xi32>) {
+ // expected-error @below {{result #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<[2]xi32>
+ llvm.return
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
new file mode 100644
index 00000000000000..ab35ec98c9c66f
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
@@ -0,0 +1,449 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: data=2, compressed_data=1, metadata=1
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_1(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i8> %[[CDATA]] to i32
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return %metadata : i32
+}
+
+// rpf=2: data=4, compressed_data=2, metadata=1
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_2(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i8> } @llvm.nvvm.spcompress.i32.v8i8.v16i8(<16 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i8> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<2xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=4: data=8, compressed_data=4, metadata=1
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <16 x i8> } @llvm.nvvm.spcompress.i32.v16i8.v32i8(<32 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <16 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <16 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i8> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x4
+ : i32, vector<8xi32> -> i32, vector<4xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=8: data=16, compressed_data=8, metadata=2
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <32 x i8> } @llvm.nvvm.spcompress.v2i32.v32i8.v64i8(<64 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i8> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x8
+ : i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
+ llvm.return %metadata : vector<2xi32>
+}
+
+// rpf=16: data=32, compressed_data=16, metadata=4
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <64 x i8> } @llvm.nvvm.spcompress.v4i32.v64i8.v128i8(<128 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i8> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x16
+ : i32, vector<32xi32> -> vector<4xi32>, vector<16xi32>
+ llvm.return %metadata : vector<4xi32>
+}
+
+// rpf=32: data=64, compressed_data=32, metadata=8
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_32(i32 %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <256 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <128 x i8> } @llvm.nvvm.spcompress.v8i32.v128i8.v256i8(<256 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i8> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x32
+ : i32, vector<64xi32> -> vector<8xi32>, vector<32xi32>
+ llvm.return %metadata : vector<8xi32>
+}
+
+// rpf=64: data=128, compressed_data=64, metadata=16
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_64(i32 %0, <128 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <512 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <256 x i8> } @llvm.nvvm.spcompress.v16i32.v256i8.v512i8(<512 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <16 x i32>, <256 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <16 x i32>, <256 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <256 x i8> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x64
+ : i32, vector<128xi32> -> vector<16xi32>, vector<64xi32>
+ llvm.return %metadata : vector<16xi32>
+}
+
+// rpf=1: data=2, compressed_data=1, metadata=1
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i8> %[[CDATA]] to i32
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return %metadata : i32
+}
+
+// rpf=2: data=4, compressed_data=2, metadata=1
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i8> } @llvm.nvvm.spcompress.i32.v8i8.v16i8(<16 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i8> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<2xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=4: data=8, compressed_data=4, metadata=2
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <16 x i8> } @llvm.nvvm.spcompress.v2i32.v16i8.v32i8(<32 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i8> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, vector<8xi32> -> vector<2xi32>, vector<4xi32>
+ llvm.return %metadata : vector<2xi32>
+}
+
+// rpf=8: data=16, compressed_data=8, metadata=4
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <32 x i8> } @llvm.nvvm.spcompress.v4i32.v32i8.v64i8(<64 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i8> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x8
+ : i32, vector<16xi32> -> vector<4xi32>, vector<8xi32>
+ llvm.return %metadata : vector<4xi32>
+}
+
+// rpf=16: data=32, compressed_data=16, metadata=8
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_16(i32 %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <64 x i8> } @llvm.nvvm.spcompress.v8i32.v64i8.v128i8(<128 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i8> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x16
+ : i32, vector<32xi32> -> vector<8xi32>, vector<16xi32>
+ llvm.return %metadata : vector<8xi32>
+}
+
+// rpf=32: data=64, compressed_data=32, metadata=16
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_32(i32 %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <256 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <128 x i8> } @llvm.nvvm.spcompress.v16i32.v128i8.v256i8(<256 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i8> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x32
+ : i32, vector<64xi32> -> vector<16xi32>, vector<32xi32>
+ llvm.return %metadata : vector<16xi32>
+}
+
+// rpf=64: data=128, compressed_data=64, metadata=32
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_64(i32 %0, <128 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <512 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <32 x i32>, <256 x i8> } @llvm.nvvm.spcompress.v32i32.v256i8.v512i8(<512 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <32 x i32>, <256 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <32 x i32>, <256 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <256 x i8> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x64
+ : i32, vector<128xi32> -> vector<32xi32>, vector<64xi32>
+ llvm.return %metadata : vector<32xi32>
+}
+
+// rpf=1: data=2, compressed_data=1, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_1(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <2 x i16> } @llvm.nvvm.spcompress.i32.v2i16.v4i16(<4 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <2 x i16> %[[CDATA]] to i32
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return %metadata : i32
+}
+
+// rpf=2: data=4, compressed_data=2, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i16> } @llvm.nvvm.spcompress.i32.v4i16.v8i16(<8 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i16> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<2xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=4: data=8, compressed_data=4, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i16> } @llvm.nvvm.spcompress.i32.v8i16.v16i16(<16 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i16> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x4
+ : i32, vector<8xi32> -> i32, vector<4xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=8: data=16, compressed_data=8, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <16 x i16> } @llvm.nvvm.spcompress.i32.v16i16.v32i16(<32 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <16 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <16 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i16> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x8
+ : i32, vector<16xi32> -> i32, vector<8xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=16: data=32, compressed_data=16, metadata=2
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <32 x i16> } @llvm.nvvm.spcompress.v2i32.v32i16.v64i16(<64 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i16> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x16
+ : i32, vector<32xi32> -> vector<2xi32>, vector<16xi32>
+ llvm.return %metadata : vector<2xi32>
+}
+
+// rpf=32: data=64, compressed_data=32, metadata=4
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_32(i32 %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <64 x i16> } @llvm.nvvm.spcompress.v4i32.v64i16.v128i16(<128 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i16> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x32
+ : i32, vector<64xi32> -> vector<4xi32>, vector<32xi32>
+ llvm.return %metadata : vector<4xi32>
+}
+
+// rpf=64: data=128, compressed_data=64, metadata=8
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_64(i32 %0, <128 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <256 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <128 x i16> } @llvm.nvvm.spcompress.v8i32.v128i16.v256i16(<256 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i16> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x64
+ : i32, vector<128xi32> -> vector<8xi32>, vector<64xi32>
+ llvm.return %metadata : vector<8xi32>
+}
+
+// rpf=1: data=2, compressed_data=1, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <2 x i16> } @llvm.nvvm.spcompress.i32.v2i16.v4i16(<4 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <2 x i16> %[[CDATA]] to i32
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return %metadata : i32
+}
+
+// rpf=2: data=4, compressed_data=2, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i16> } @llvm.nvvm.spcompress.i32.v4i16.v8i16(<8 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i16> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, vector<4xi32> -> i32, vector<2xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=4: data=8, compressed_data=4, metadata=1
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i16> } @llvm.nvvm.spcompress.i32.v8i16.v16i16(<16 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i16> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: ret i32 %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<8xi32> -> i32, vector<4xi32>
+ llvm.return %metadata : i32
+}
+
+// rpf=8: data=16, compressed_data=8, metadata=2
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <16 x i16> } @llvm.nvvm.spcompress.v2i32.v16i16.v32i16(<32 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i16> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x8
+ : i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
+ llvm.return %metadata : vector<2xi32>
+}
+
+// rpf=16: data=32, compressed_data=16, metadata=4
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_16(i32 %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <32 x i16> } @llvm.nvvm.spcompress.v4i32.v32i16.v64i16(<64 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i16> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x16
+ : i32, vector<32xi32> -> vector<4xi32>, vector<16xi32>
+ llvm.return %metadata : vector<4xi32>
+}
+
+// rpf=32: data=64, compressed_data=32, metadata=8
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_32(i32 %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <64 x i16> } @llvm.nvvm.spcompress.v8i32.v64i16.v128i16(<128 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i16> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x32
+ : i32, vector<64xi32> -> vector<8xi32>, vector<32xi32>
+ llvm.return %metadata : vector<8xi32>
+}
+
+// rpf=64: data=128, compressed_data=64, metadata=16
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_64(i32 %0, <128 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <256 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <128 x i16> } @llvm.nvvm.spcompress.v16i32.v128i16.v256i16(<256 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i16> } %[[RES]], 0
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i16> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i16> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x64
+ : i32, vector<128xi32> -> vector<16xi32>, vector<64xi32>
+ llvm.return %metadata : vector<16xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
new file mode 100644
index 00000000000000..63589511d9e281
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
@@ -0,0 +1,110 @@
+// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
+
+llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: i32) {
+ // expected-error @below {{Invalid compFactor, element size, and repeat factor combination}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_data_too_large(%metadata: i32, %compdata: vector<16xi32>) {
+ // expected-error @below {{Invalid compFactor, element size, and repeat factor combination}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x32
+ : i32, vector<16xi32> -> vector<128xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_comp_factor_elem_size(%metadata: i32, %compdata: vector<2xi32>) {
+ // expected-error @below {{Invalid compFactor and element size combination}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_index_size(%metadata: i32, %compdata: i32) {
+ // expected-error @below {{Invalid index size and target combination, target should be at most 4 if index size is 2}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_data_size(%metadata: i32, %compdata: i32) {
+ // expected-error @below {{Operation attributes and provided output data size doesn't match}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_compressed_data_size(%metadata: i32, %compdata: vector<2xi32>) {
+ // expected-error @below {{Operation attributes and provided input compressed data size doesn't match}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, vector<2xi32> -> vector<2xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdata: i32) {
+ // expected-error @below {{Operation attributes and provided input metadata size doesn't match}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : vector<2xi32>, i32 -> vector<2xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_comp_factor(%metadata: i32, %compdata: i32) {
+ %res = nvvm.spdecompress %metadata, %compdata
+ // expected-error @below {{expected string or keyword containing one of the following enum values for attribute 'compFactor' [sp1to2, sp1to4, sp1to8, sp1to16, sp2to4, sp2to8, sp2to16, sp4to8, sp4to16]}}
+ comp_factor = sp3to4 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vector<[2]xi32>) {
+ // expected-error @below {{operand #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x8
+ : i32, vector<[2]xi32> -> vector<4xi32>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: i32) {
+ %metadata = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
+ // expected-error @below {{operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64 of ranks 1, but got 'vector<1x2xi32>'}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x2
+ : vector<1x2xi32>, i32 -> i32
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_scalable_data(%metadata: i32, %compdata: i32) {
+ // expected-error @below {{result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<[2]xi32>
+ llvm.return
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
new file mode 100644
index 00000000000000..f1cc5665b9b70d
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
@@ -0,0 +1,158 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=8
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=1, data=16
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=2, data=32
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x8
+ : i32, vector<2xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=4, data=64
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<2xi32>, vector<4xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=8, data=128
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<4xi32>, vector<8xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=8
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=16
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, i32 -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=32
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<2xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=64
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x8
+ : i32, vector<4xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=8, data=128
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<2xi32>, vector<8xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
new file mode 100644
index 00000000000000..38d2bddfdb80b5
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
@@ -0,0 +1,369 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=2: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=4: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x8
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=16: metadata=1, compressed_data=4, data=8
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x16
+ : i32, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=32: metadata=2, compressed_data=8, data=16
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x32
+ : vector<2xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=64: metadata=4, compressed_data=16, data=32
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x64
+ : vector<4xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=4: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x8
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=4, data=8
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<2xi32>, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=8, data=16
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<4xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=16, data=32
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x64
+ : vector<8xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i16> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x4
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=8
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x8
+ : i32, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=16: metadata=1, compressed_data=8, data=16
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x16
+ : i32, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=32: metadata=2, compressed_data=16, data=32
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(<2 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x32
+ : vector<2xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=64: metadata=4, compressed_data=32, data=64
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(<4 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x64
+ : vector<4xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i16> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=8
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x8
+ : i32, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=8, data=16
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<2xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=16, data=32
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x32
+ : vector<4xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=32, data=64
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(<8 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x64
+ : vector<8xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
new file mode 100644
index 00000000000000..5e1d0e76fa10d9
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
@@ -0,0 +1,399 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x8
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=16: metadata=1, compressed_data=4, data=16
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v16i8(i32 %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x16
+ : i32, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=32: metadata=2, compressed_data=8, data=32
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x32
+ : vector<2xi32>, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=64: metadata=4, compressed_data=16, data=64
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x64
+ : vector<4xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x8
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=4, data=16
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<2xi32>, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=8, data=32
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<4xi32>, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=16, data=64
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x64
+ : vector<8xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x2
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x4
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=16
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x8
+ : i32, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=1, compressed_data=8, data=32
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v16i16(i32 %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x16
+ : i32, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=2, compressed_data=16, data=64
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(<2 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x32
+ : vector<2xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=4, compressed_data=32, data=128
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(<4 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x64
+ : vector<4xi32>, vector<32xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=16
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x8
+ : i32, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=8, data=32
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<2xi32>, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=16, data=64
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x32
+ : vector<4xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=32, data=128
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(<8 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x64
+ : vector<8xi32>, vector<32xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
new file mode 100644
index 00000000000000..9be00dbd908606
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
@@ -0,0 +1,186 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=1, data=8
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, i32 -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=2, data=16
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x8
+ : i32, vector<2xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=4, data=32
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<2xi32>, vector<4xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=8, data=64
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<4xi32>, vector<8xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=16, data=128
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x64
+ : vector<8xi32>, vector<16xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=8
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, i32 -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=16
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<2xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=32
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x8
+ : i32, vector<4xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=8, data=64
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<2xi32>, vector<8xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=16, data=128
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x32
+ : vector<4xi32>, vector<16xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
new file mode 100644
index 00000000000000..3ffd0f43a760b6
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
@@ -0,0 +1,156 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=8
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=16
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, vector<2xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=8: metadata=2, compressed_data=4, data=32
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x8
+ : vector<2xi32>, vector<4xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=16: metadata=4, compressed_data=8, data=64
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<4xi32>, vector<8xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=32: metadata=8, compressed_data=16, data=128
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<8xi32>, vector<16xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=8
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=2, data=16
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, vector<2xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=4, data=32
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<4xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=8: metadata=2, compressed_data=8, data=64
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x8
+ : vector<2xi32>, vector<8xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=16: metadata=4, compressed_data=16, data=128
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<4xi32>, vector<16xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
new file mode 100644
index 00000000000000..c418ec19391395
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
@@ -0,0 +1,395 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x4
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=4, data=8
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x8
+ : i32, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=8, data=16
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x16
+ : vector<2xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=16, data=32
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x32
+ : vector<4xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=32, data=64
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(<8 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v128i8(<8 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x64
+ : vector<8xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=1
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
+ // CHECK-LABEL: define i32 @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
+ // CHECK-NEXT: ret i32 %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> i32
+ llvm.return %res : i32
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=8: metadata=2, compressed_data=4, data=8
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x8
+ : vector<2xi32>, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=16: metadata=4, compressed_data=8, data=16
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<4xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=32: metadata=8, compressed_data=16, data=32
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<8xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=64: metadata=16, compressed_data=32, data=64
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(<16 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x64
+ : vector<16xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x2
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=4, data=8
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x4
+ : i32, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=1, compressed_data=8, data=16
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x8
+ : i32, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=2, compressed_data=16, data=32
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(<2 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x16
+ : vector<2xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=4, compressed_data=32, data=64
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(<4 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x32
+ : vector<4xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=8, compressed_data=64, data=128
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(<8 x i32> %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v128i16(<8 x i32> %0, <128 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x64
+ : vector<8xi32>, vector<64xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=4, data=8
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=2, compressed_data=8, data=16
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x8
+ : vector<2xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=4, compressed_data=16, data=32
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<4xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=8, compressed_data=32, data=64
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(<8 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x32
+ : vector<8xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=16, compressed_data=64, data=128
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<64xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(<16 x i32> %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v16i32.v128i16(<16 x i32> %0, <128 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x64
+ : vector<16xi32>, vector<64xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
new file mode 100644
index 00000000000000..89fb641e044b31
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
@@ -0,0 +1,184 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x4
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=2, compressed_data=4, data=16
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x8
+ : vector<2xi32>, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=4, compressed_data=8, data=32
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<4xi32>, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=8, compressed_data=16, data=64
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<8xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=16, compressed_data=32, data=128
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(<16 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x64
+ : vector<16xi32>, vector<32xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
+
+// rpf=1: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x1
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x2
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=4: metadata=1, compressed_data=4, data=16
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x4
+ : i32, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=8: metadata=2, compressed_data=8, data=32
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x8
+ : vector<2xi32>, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=16: metadata=4, compressed_data=16, data=64
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x16
+ : vector<4xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=32: metadata=8, compressed_data=32, data=128
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(<8 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x32
+ : vector<8xi32>, vector<32xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
new file mode 100644
index 00000000000000..420abe11bb9858
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
@@ -0,0 +1,85 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=4
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=2, data=8
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, vector<2xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=4: metadata=2, compressed_data=4, data=16
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x4
+ : vector<2xi32>, vector<4xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=8: metadata=4, compressed_data=8, data=32
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x8
+ : vector<4xi32>, vector<8xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=16: metadata=8, compressed_data=16, data=64
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<8xi32>, vector<16xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=32: metadata=16, compressed_data=32, data=128
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(<16 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<16xi32>, vector<32xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
new file mode 100644
index 00000000000000..7489b33472b463
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
@@ -0,0 +1,99 @@
+// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
+
+// rpf=1: metadata=1, compressed_data=1, data=2
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
+ // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x1
+ : i32, i32 -> vector<2xi32>
+ llvm.return %res : vector<2xi32>
+}
+
+// rpf=2: metadata=1, compressed_data=2, data=4
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
+ // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x2
+ : i32, vector<2xi32> -> vector<4xi32>
+ llvm.return %res : vector<4xi32>
+}
+
+// rpf=4: metadata=2, compressed_data=4, data=8
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(<2 x i32> %0, <4 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
+ // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x4
+ : vector<2xi32>, vector<4xi32> -> vector<8xi32>
+ llvm.return %res : vector<8xi32>
+}
+
+// rpf=8: metadata=4, compressed_data=8, data=16
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(<4 x i32> %0, <8 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
+ // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x8
+ : vector<4xi32>, vector<8xi32> -> vector<16xi32>
+ llvm.return %res : vector<16xi32>
+}
+
+// rpf=16: metadata=8, compressed_data=16, data=32
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(<8 x i32> %0, <16 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
+ // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x16
+ : vector<8xi32>, vector<16xi32> -> vector<32xi32>
+ llvm.return %res : vector<32xi32>
+}
+
+// rpf=32: metadata=16, compressed_data=32, data=64
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
+ // CHECK-LABEL: define <64 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(<16 x i32> %0, <32 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
+ // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x32
+ : vector<16xi32>, vector<32xi32> -> vector<64xi32>
+ llvm.return %res : vector<64xi32>
+}
+
+// rpf=64: metadata=32, compressed_data=64, data=128
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<32xi32>, %compdata: vector<64xi32>) -> vector<128xi32> {
+ // CHECK-LABEL: define <128 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(<32 x i32> %0, <64 x i32> %1) {
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <64 x i32> %1 to <256 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v32i32.v256i8(<32 x i32> %0, <256 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
+ // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x64
+ : vector<32xi32>, vector<64xi32> -> vector<128xi32>
+ llvm.return %res : vector<128xi32>
+}
>From d43b0515855792feeaa3cb8e430c6092540f2baf Mon Sep 17 00:00:00 2001
From: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: Sat, 17 Oct 2026 15:14:35 +0200
Subject: [PATCH 2/4] [MLIR][NVVM] Address feedback
---
mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 98 +++++++------------
mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 62 +-----------
.../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 82 ++++++++++++++++
.../LLVMIR/nvvm/spcompress-invalid.mlir | 28 ++++--
.../Target/LLVMIR/nvvm/spcompress-sp2to4.mlir | 73 ++++++++------
.../LLVMIR/nvvm/spdecompress-invalid.mlir | 38 ++++---
.../LLVMIR/nvvm/spdecompress-sp1to16.mlir | 22 ++---
.../LLVMIR/nvvm/spdecompress-sp1to2.mlir | 69 ++++++++-----
.../LLVMIR/nvvm/spdecompress-sp1to4.mlir | 56 +++++------
.../LLVMIR/nvvm/spdecompress-sp1to8.mlir | 26 ++---
.../LLVMIR/nvvm/spdecompress-sp2to16.mlir | 22 ++---
.../LLVMIR/nvvm/spdecompress-sp2to4.mlir | 56 +++++------
.../LLVMIR/nvvm/spdecompress-sp2to8.mlir | 26 ++---
.../LLVMIR/nvvm/spdecompress-sp4to16.mlir | 12 +--
.../LLVMIR/nvvm/spdecompress-sp4to8.mlir | 14 +--
15 files changed, 369 insertions(+), 315 deletions(-)
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index 230cdd18fc8eb9..d0882b666488c7 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -7256,21 +7256,8 @@ def SPElemSize : I32EnumAttr<"SPElemSize", "Structured sparsity element size", [
def SPElemSizeAttr : EnumAttr<NVVM_Dialect, SPElemSize, "sp_elem_size">;
// Structured sparsity repetition factor
-def SPRepFactorX1 : I32EnumAttrCase<"X1", 1, "x1">;
-def SPRepFactorX2 : I32EnumAttrCase<"X2", 2, "x2">;
-def SPRepFactorX4 : I32EnumAttrCase<"X4", 4, "x4">;
-def SPRepFactorX8 : I32EnumAttrCase<"X8", 8, "x8">;
-def SPRepFactorX16 : I32EnumAttrCase<"X16", 16, "x16">;
-def SPRepFactorX32 : I32EnumAttrCase<"X32", 32, "x32">;
-def SPRepFactorX64 : I32EnumAttrCase<"X64", 64, "x64">;
-def SPRepFactor : I32EnumAttr<"SPRepFactor",
- "Structured sparsity repetition factor",
- [SPRepFactorX1, SPRepFactorX2, SPRepFactorX4, SPRepFactorX8,
- SPRepFactorX16, SPRepFactorX32, SPRepFactorX64]> {
- let genSpecializedAttr = 0;
- let cppNamespace = "::mlir::NVVM";
-}
-def SPRepFactorAttr : EnumAttr<NVVM_Dialect, SPRepFactor, "sp_rep_factor">;
+def SPRepFactorAttr : ConfinedAttr<I32Attr, [
+ IntIsOneOf<[1, 2, 4, 8, 16, 32, 64]>]>;
// spcompress only supports the 2:4 sparsity factor.
def SPCompressFactorAttr : ConfinedAttr<SPFactorAttr, [
@@ -7279,11 +7266,12 @@ def SPCompressFactorAttr : ConfinedAttr<SPFactorAttr, [
]>
]>;
-// Register bundles are i32 or fixed-length, rank-1 vectors of i32.
+// Register bundles are i32 or fixed-length, rank-1 vectors of i32. A
+// single-register bundle may be either i32 or vector<1xi32>.
defvar SPDataType = FixedVectorOfRankAndLengthAndType<[1],
[2, 4, 8, 16, 32, 64, 128], [I32]>;
defvar SPRegType = AnyTypeOf<[I32,
- FixedVectorOfRankAndLengthAndType<[1], [2, 4, 8, 16, 32, 64], [I32]>]>;
+ FixedVectorOfRankAndLengthAndType<[1], [1, 2, 4, 8, 16, 32, 64], [I32]>]>;
def NVVM_SPCompressOp : NVVM_Op<"spcompress",
[Pure, NVVMRequiresSMa<[107]>]> {
@@ -7293,8 +7281,9 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
vector `compressed_data`. The indices of the selected elements are
returned in `metadata`.
- All vectors are bundles of 32-bit registers. The elements are packed into
- these registers according to `elemSize`.
+ All vectors are bundles of 32-bit registers. A single-register bundle may
+ be either `i32` or `vector<1xi32>`. The elements are packed into these
+ registers according to `elemSize`.
Arguments:
- `spDesc`: Sparsity descriptor specifying the selection operation and the
@@ -7304,7 +7293,7 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
- `compFactor`: Compression factor. Only `sp2to4` is supported.
- `indexSize`: Size in bits of each metadata index (`b2` or `b4`).
- `elemSize`: Size in bits of each element in `data` (`b8` or `b16`).
- - `repFactor`: Repeat factor of the operation (`x1` to `x64`).
+ - `repFactor`: Repeat factor of the operation (a power of two from 1 to 64).
Results:
- `metadata`: Indices of the selected elements, stored in
@@ -7315,17 +7304,17 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
```mlir
// 8-bit elements, 2-bit indices, repeat factor of 1.
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
// 8-bit elements, 4-bit indices, repeat factor of 2.
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<2xi32>
// 16-bit elements, 4-bit indices, repeat factor of 8.
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 8
: i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
```
@@ -7349,34 +7338,19 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
`comp_factor` `=` enum($compFactor)
`index_size` `=` enum($indexSize)
`elem_size` `=` enum($elemSize)
- `rep_factor` `=` enum($repFactor)
+ `rep_factor` `=` $repFactor
attr-dict `:` type(operands) `->` type($metadata) `,` type($compressed_data)
}];
let extraClassDeclaration = [{
- static NVVM::IDArgPair getIntrinsicIDAndArgs(Operation &op,
- LLVM::ModuleTranslation &mt,
- llvm::IRBuilderBase &builder);
+ static void lowerToLLVMIR(Operation &op, LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder);
}];
let hasVerifier = 1;
string llvmBuilder = [{
- auto [id, args] = NVVM::SPCompressOp::getIntrinsicIDAndArgs(
- *op, moduleTranslation, builder);
- // The intrinsic returns the compressed data with one lane per element.
- auto *dataTy = llvm::cast<llvm::FixedVectorType>(args[0]->getType());
- llvm::Type *compressedTy = llvm::FixedVectorType::get(
- dataTy->getElementType(), dataTy->getNumElements() / 2);
- llvm::Type *metadataTy = moduleTranslation.convertType(
- op.getMetadata().getType());
- llvm::Type *resultTy = llvm::StructType::get(
- builder.getContext(), {metadataTy, compressedTy});
- llvm::CallInst *result = createIntrinsicCall(builder, id, resultTy, args);
- $metadata = builder.CreateExtractValue(result, 0);
- $compressed_data = builder.CreateBitCast(
- builder.CreateExtractValue(result, 1),
- moduleTranslation.convertType(op.getCompressedData().getType()));
+ NVVM::SPCompressOp::lowerToLLVMIR(*op, moduleTranslation, builder);
}];
}
@@ -7388,8 +7362,9 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
into a dense vector `data`, using the indices stored in `metadata`. Dense
positions not selected by `metadata` are set to zero.
- All vectors are bundles of 32-bit registers. The elements are packed into
- these registers according to `elemSize`. For a decompression factor
+ All vectors are bundles of 32-bit registers. A single-register bundle may
+ be either `i32` or `vector<1xi32>`. The elements are packed into these
+ registers according to `elemSize`. For a decompression factor
`spXtoY`, the number of registers in each bundle is:
- `metadata`: `ceil(X * indexSize * repFactor / 32)`
- `compressed_data`: `ceil(X * elemSize * repFactor / 32)`
@@ -7407,7 +7382,7 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
`sp1to16`, `sp2to4`, `sp2to8`, `sp2to16`, `sp4to8`, or `sp4to16`).
- `indexSize`: Size in bits of each metadata index (`b2` or `b4`).
- `elemSize`: Size in bits of each element (`b8` or `b16`).
- - `repFactor`: Repeat factor of the operation (`x1` to `x64`).
+ - `repFactor`: Repeat factor of the operation (a power of two from 1 to 64).
Results:
- `data`: Output dense vector containing the decompressed elements.
@@ -7416,17 +7391,17 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
```mlir
// 8-bit elements, 2-bit indices, repeat factor of 1.
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, i32 -> i32
// 8-bit elements, 4-bit indices, repeat factor of 2.
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<2xi32>
// 16-bit elements, 4-bit indices, repeat factor of 64.
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x64
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 64
: vector<16xi32>, vector<64xi32> -> vector<128xi32>
```
@@ -7442,37 +7417,32 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
SPRepFactorAttr:$repFactor);
let results = (outs
- AnyTypeOf<[I32, SPDataType]>:$data);
+ AnyTypeOf<[I32,
+ FixedVectorOfRankAndLengthAndType<[1],
+ [1, 2, 4, 8, 16, 32, 64, 128], [I32]>]>:$data);
let assemblyFormat = [{
$metadata `,` $compressed_data
`comp_factor` `=` enum($compFactor)
`index_size` `=` enum($indexSize)
`elem_size` `=` enum($elemSize)
- `rep_factor` `=` enum($repFactor)
+ `rep_factor` `=` $repFactor
attr-dict `:` type($metadata) `,` type($compressed_data) `->` type($data)
}];
let extraClassDeclaration = [{
- static NVVM::IDArgPair getIntrinsicIDAndArgs(Operation &op,
- LLVM::ModuleTranslation &mt,
- llvm::IRBuilderBase &builder);
+ // Returns the {source, target} group sizes of `compFactor`, e.g. {2, 4}
+ // for sp2to4.
+ std::pair<unsigned, unsigned> getCompFactorSizes();
+
+ static void lowerToLLVMIR(Operation &op, LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder);
}];
let hasVerifier = 1;
string llvmBuilder = [{
- auto [id, args] = NVVM::SPDecompressOp::getIntrinsicIDAndArgs(
- *op, moduleTranslation, builder);
- // The intrinsic returns the dense data with one lane per element.
- auto *compressedTy = llvm::cast<llvm::FixedVectorType>(args[1]->getType());
- unsigned numTgt = llvm::cast<llvm::ConstantInt>(args[3])->getZExtValue();
- llvm::Type *dataTy = llvm::FixedVectorType::get(
- compressedTy->getElementType(),
- numTgt * static_cast<unsigned>($repFactor));
- llvm::Value *logicalData = createIntrinsicCall(builder, id, dataTy, args);
- $data = builder.CreateBitCast(
- logicalData, moduleTranslation.convertType(op.getData().getType()));
+ NVVM::SPDecompressOp::lowerToLLVMIR(*op, moduleTranslation, builder);
}];
}
diff --git a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
index 778e53f6dfff07..482ae05a6350aa 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
@@ -7082,9 +7082,8 @@ static unsigned getNumSPRegisters(Type type) {
return 1;
}
-// Returns the {source, target} group sizes of the sparsity factor.
-static std::pair<unsigned, unsigned> getSPFactor(NVVM::SPFactor compFactor) {
- switch (compFactor) {
+std::pair<unsigned, unsigned> SPDecompressOp::getCompFactorSizes() {
+ switch (getCompFactor()) {
case NVVM::SPFactor::SP1TO2:
return {1, 2};
case NVVM::SPFactor::SP1TO4:
@@ -7108,7 +7107,7 @@ static std::pair<unsigned, unsigned> getSPFactor(NVVM::SPFactor compFactor) {
}
LogicalResult SPCompressOp::verify() {
- unsigned repFactor = static_cast<unsigned>(getRepFactor());
+ unsigned repFactor = getRepFactor();
unsigned indexSize = static_cast<unsigned>(getIndexSize());
unsigned elemSize = static_cast<unsigned>(getElemSize());
@@ -7129,10 +7128,10 @@ LogicalResult SPCompressOp::verify() {
}
LogicalResult SPDecompressOp::verify() {
- unsigned repFactor = static_cast<unsigned>(getRepFactor());
+ unsigned repFactor = getRepFactor();
unsigned indexSize = static_cast<unsigned>(getIndexSize());
unsigned elemSize = static_cast<unsigned>(getElemSize());
- auto [numSrc, numTgt] = getSPFactor(getCompFactor());
+ auto [numSrc, numTgt] = getCompFactorSizes();
unsigned dataBits = numTgt * elemSize * repFactor;
if (dataBits < 32 || dataBits > 4096)
@@ -7163,57 +7162,6 @@ LogicalResult SPDecompressOp::verify() {
return success();
}
-NVVM::IDArgPair
-SPCompressOp::getIntrinsicIDAndArgs(Operation &op, LLVM::ModuleTranslation &mt,
- llvm::IRBuilderBase &builder) {
- auto thisOp = cast<NVVM::SPCompressOp>(op);
- unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
- unsigned repFactor = static_cast<unsigned>(thisOp.getRepFactor());
-
- // The intrinsic takes the dense data with one lane per element. The data
- // occupies 2 * repFactor 32-bit registers.
- llvm::Type *dataTy = llvm::FixedVectorType::get(builder.getIntNTy(elemSize),
- 64 * repFactor / elemSize);
- llvm::Value *data =
- builder.CreateBitCast(mt.lookupValue(thisOp.getData()), dataTy);
-
- llvm::SmallVector<llvm::Value *> args{
- data,
- mt.lookupValue(thisOp.getSpDesc()),
- builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
- // spcompress only supports the sp2to4 compression factor.
- builder.getInt32(4),
- };
- return {llvm::Intrinsic::nvvm_spcompress, std::move(args)};
-}
-
-NVVM::IDArgPair SPDecompressOp::getIntrinsicIDAndArgs(
- Operation &op, LLVM::ModuleTranslation &mt, llvm::IRBuilderBase &builder) {
- auto thisOp = cast<NVVM::SPDecompressOp>(op);
- auto [numSrc, numTgt] = getSPFactor(thisOp.getCompFactor());
- unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
- unsigned repFactor = static_cast<unsigned>(thisOp.getRepFactor());
-
- // The intrinsic takes the compressed data with one lane per element.
- // Compressed data narrower than 32 bits is carried in the low bits of an i32.
- llvm::Value *compressedData = mt.lookupValue(thisOp.getCompressedData());
- unsigned compressedBits = numSrc * elemSize * repFactor;
- if (compressedBits < 32)
- compressedData =
- builder.CreateTrunc(compressedData, builder.getIntNTy(compressedBits));
- llvm::Type *compressedTy = llvm::FixedVectorType::get(
- builder.getIntNTy(elemSize), numSrc * repFactor);
- compressedData = builder.CreateBitCast(compressedData, compressedTy);
-
- llvm::SmallVector<llvm::Value *> args{
- mt.lookupValue(thisOp.getMetadata()),
- compressedData,
- builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
- builder.getInt32(numTgt),
- };
- return {llvm::Intrinsic::nvvm_spdecompress, std::move(args)};
-}
-
//===----------------------------------------------------------------------===//
// NVVMDialect initialization, type parsing, and registration.
//===----------------------------------------------------------------------===//
diff --git a/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
index f7f2503eee4284..6e84b45d7bb578 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
@@ -634,6 +634,88 @@ void NVVM::FmaOp::lowerFmaToLLVMIR(Operation &op, LLVM::ModuleTranslation &mt,
}
}
+// Returns the LLVM type the sp{de}compress intrinsics use for a register
+// bundle: i32 for a single register (including vector<1xi32>) and a vector of
+// i32 otherwise.
+static llvm::Type *getSPRegistersType(Type type, llvm::IRBuilderBase &builder) {
+ auto vecTy = dyn_cast<VectorType>(type);
+ if (!vecTy || vecTy.getNumElements() == 1)
+ return builder.getInt32Ty();
+ return llvm::FixedVectorType::get(builder.getInt32Ty(),
+ vecTy.getNumElements());
+}
+
+// Returns the register bundle `value` in the type the sp{de}compress
+// intrinsics expect.
+static llvm::Value *lookupSPRegisters(Value value, LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder) {
+ return builder.CreateBitCast(mt.lookupValue(value),
+ getSPRegistersType(value.getType(), builder));
+}
+
+void NVVM::SPCompressOp::lowerToLLVMIR(Operation &op,
+ LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder) {
+ auto thisOp = cast<NVVM::SPCompressOp>(op);
+ unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
+ unsigned numElems = thisOp.getRepFactor() * 32 / elemSize;
+ llvm::Type *elemTy = builder.getIntNTy(elemSize);
+
+ // The intrinsic works on vectors with one lane per element: the dense data
+ // occupies 2 * repFactor registers and the compressed data repFactor.
+ llvm::Value *data =
+ builder.CreateBitCast(mt.lookupValue(thisOp.getData()),
+ llvm::FixedVectorType::get(elemTy, 2 * numElems));
+ llvm::Type *resultTy = llvm::StructType::get(
+ getSPRegistersType(thisOp.getMetadata().getType(), builder),
+ llvm::FixedVectorType::get(elemTy, numElems));
+
+ llvm::Value *result = createIntrinsicCall(
+ builder, llvm::Intrinsic::nvvm_spcompress, resultTy,
+ {data, mt.lookupValue(thisOp.getSpDesc()),
+ builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
+ // spcompress only supports the sp2to4 compression factor.
+ builder.getInt32(4)});
+
+ for (auto [idx, res] : llvm::enumerate(thisOp->getResults()))
+ mt.mapValue(res) = builder.CreateBitCast(
+ builder.CreateExtractValue(result, static_cast<unsigned>(idx)),
+ mt.convertType(res.getType()));
+}
+
+void NVVM::SPDecompressOp::lowerToLLVMIR(Operation &op,
+ LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder) {
+ auto thisOp = cast<NVVM::SPDecompressOp>(op);
+ auto [numSrc, numTgt] = thisOp.getCompFactorSizes();
+ unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
+ unsigned repFactor = thisOp.getRepFactor();
+ llvm::Type *elemTy = builder.getIntNTy(elemSize);
+
+ llvm::Value *metadata = lookupSPRegisters(thisOp.getMetadata(), mt, builder);
+
+ // The intrinsic works on vectors with one lane per element. Compressed data
+ // narrower than 32 bits is carried in the low bits of an i32.
+ llvm::Value *compressedData =
+ lookupSPRegisters(thisOp.getCompressedData(), mt, builder);
+ unsigned compressedBits = numSrc * elemSize * repFactor;
+ if (compressedBits < 32)
+ compressedData =
+ builder.CreateTrunc(compressedData, builder.getIntNTy(compressedBits));
+ compressedData = builder.CreateBitCast(
+ compressedData, llvm::FixedVectorType::get(elemTy, numSrc * repFactor));
+
+ llvm::Value *data = createIntrinsicCall(
+ builder, llvm::Intrinsic::nvvm_spdecompress,
+ llvm::FixedVectorType::get(elemTy, numTgt * repFactor),
+ {metadata, compressedData,
+ builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
+ builder.getInt32(numTgt)});
+
+ mt.mapValue(thisOp.getData()) =
+ builder.CreateBitCast(data, mt.convertType(thisOp.getData().getType()));
+}
+
namespace {
/// Implementation of the dialect interface that converts operations belonging
/// to the NVVM dialect to LLVM IR.
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
index 3eb906346a33cc..248109ade56225 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
@@ -3,7 +3,7 @@
llvm.func @spcompress_invalid_data_size(%spdesc: i32, %data: vector<2xi32>) {
// expected-error @below {{Operation attributes and provided input data size doesn't match}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, vector<2xi32> -> i32, vector<2xi32>
llvm.return
}
@@ -13,7 +13,7 @@ llvm.func @spcompress_invalid_data_size(%spdesc: i32, %data: vector<2xi32>) {
llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<4xi32>) {
// expected-error @below {{Operation attributes and provided output compressed data size doesn't match}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<4xi32>
llvm.return
}
@@ -23,7 +23,7 @@ llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<4
llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<4xi32>) {
// expected-error @below {{Operation attributes and provided output metadata size doesn't match}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, vector<4xi32> -> vector<2xi32>, vector<2xi32>
llvm.return
}
@@ -33,7 +33,7 @@ llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<4xi32>)
llvm.func @spcompress_invalid_elem_size(%spdesc: i32, %data: vector<2xi32>) {
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
// expected-error @below {{expected string or keyword containing one of the following enum values for attribute 'elemSize' [b8, b16]}}
- comp_factor = sp2to4 index_size = b2 elem_size = b32 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b32 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
llvm.return
}
@@ -43,7 +43,7 @@ llvm.func @spcompress_invalid_elem_size(%spdesc: i32, %data: vector<2xi32>) {
llvm.func @spcompress_invalid_comp_factor(%spdesc: i32, %data: vector<2xi32>) {
// expected-error @below {{attribute 'compFactor' failed to satisfy constraint: Structured sparsity factor whose value is one of {sp2to4}}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
llvm.return
}
@@ -53,7 +53,7 @@ llvm.func @spcompress_invalid_comp_factor(%spdesc: i32, %data: vector<2xi32>) {
llvm.func @spcompress_scalable_data(%spdesc: i32, %data: vector<[2]xi32>) {
// expected-error @below {{operand #1 must be fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, vector<[2]xi32> -> i32, i32
llvm.return
}
@@ -64,7 +64,7 @@ llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<2xi32>) {
%data = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
// expected-error @below {{operand #1 must be fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<1x2xi32>'}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, vector<1x2xi32> -> i32, i32
llvm.return
}
@@ -72,9 +72,19 @@ llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<2xi32>) {
// -----
llvm.func @spcompress_scalable_compressed_data(%spdesc: i32, %data: vector<4xi32>) {
- // expected-error @below {{result #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
+ // expected-error @below {{result #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<[2]xi32>
llvm.return
}
+
+// -----
+
+llvm.func @spcompress_invalid_rep_factor(%spdesc: i32, %data: vector<2xi32>) {
+ // expected-error @below {{attribute 'repFactor' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {1, 2, 4, 8, 16, 32, 64}}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 3
+ : i32, vector<2xi32> -> i32, i32
+ llvm.return
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
index ab35ec98c9c66f..ee9ab8ae3880df 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
@@ -11,7 +11,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<2xi32>
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
llvm.return %metadata : i32
}
@@ -27,7 +27,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<4xi32>
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<2xi32>
llvm.return %metadata : i32
}
@@ -43,7 +43,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<8xi32>
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x4
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 4
: i32, vector<8xi32> -> i32, vector<4xi32>
llvm.return %metadata : i32
}
@@ -59,7 +59,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<16xi32
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x8
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 8
: i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
llvm.return %metadata : vector<2xi32>
}
@@ -75,7 +75,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<32xi3
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x16
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 16
: i32, vector<32xi32> -> vector<4xi32>, vector<16xi32>
llvm.return %metadata : vector<4xi32>
}
@@ -91,7 +91,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<64xi3
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x32
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 32
: i32, vector<64xi32> -> vector<8xi32>, vector<32xi32>
llvm.return %metadata : vector<8xi32>
}
@@ -107,7 +107,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<128xi
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x64
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 64
: i32, vector<128xi32> -> vector<16xi32>, vector<64xi32>
llvm.return %metadata : vector<16xi32>
}
@@ -123,7 +123,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<2xi32>
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
llvm.return %metadata : i32
}
@@ -139,7 +139,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<4xi32>
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<2xi32>
llvm.return %metadata : i32
}
@@ -155,7 +155,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<8xi32>
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 4
: i32, vector<8xi32> -> vector<2xi32>, vector<4xi32>
llvm.return %metadata : vector<2xi32>
}
@@ -171,7 +171,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<16xi32
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 8
: i32, vector<16xi32> -> vector<4xi32>, vector<8xi32>
llvm.return %metadata : vector<4xi32>
}
@@ -187,7 +187,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<32xi3
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 16
: i32, vector<32xi32> -> vector<8xi32>, vector<16xi32>
llvm.return %metadata : vector<8xi32>
}
@@ -203,7 +203,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<64xi3
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 32
: i32, vector<64xi32> -> vector<16xi32>, vector<32xi32>
llvm.return %metadata : vector<16xi32>
}
@@ -219,7 +219,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<128xi
// CHECK-NEXT: ret <32 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 64
: i32, vector<128xi32> -> vector<32xi32>, vector<64xi32>
llvm.return %metadata : vector<32xi32>
}
@@ -235,7 +235,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<2xi32
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
llvm.return %metadata : i32
}
@@ -251,7 +251,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<4xi32
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<2xi32>
llvm.return %metadata : i32
}
@@ -267,7 +267,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<8xi32
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x4
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 4
: i32, vector<8xi32> -> i32, vector<4xi32>
llvm.return %metadata : i32
}
@@ -283,7 +283,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<16xi3
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 8
: i32, vector<16xi32> -> i32, vector<8xi32>
llvm.return %metadata : i32
}
@@ -299,7 +299,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<32xi
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x16
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 16
: i32, vector<32xi32> -> vector<2xi32>, vector<16xi32>
llvm.return %metadata : vector<2xi32>
}
@@ -315,7 +315,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<64xi
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x32
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 32
: i32, vector<64xi32> -> vector<4xi32>, vector<32xi32>
llvm.return %metadata : vector<4xi32>
}
@@ -331,7 +331,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<128x
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x64
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 64
: i32, vector<128xi32> -> vector<8xi32>, vector<64xi32>
llvm.return %metadata : vector<8xi32>
}
@@ -347,7 +347,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<2xi32
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 1
: i32, vector<2xi32> -> i32, i32
llvm.return %metadata : i32
}
@@ -363,7 +363,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<4xi32
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 2
: i32, vector<4xi32> -> i32, vector<2xi32>
llvm.return %metadata : i32
}
@@ -379,7 +379,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<8xi32
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<8xi32> -> i32, vector<4xi32>
llvm.return %metadata : i32
}
@@ -395,7 +395,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<16xi3
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 8
: i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
llvm.return %metadata : vector<2xi32>
}
@@ -411,7 +411,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<32xi
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 16
: i32, vector<32xi32> -> vector<4xi32>, vector<16xi32>
llvm.return %metadata : vector<4xi32>
}
@@ -427,7 +427,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<64xi
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 32
: i32, vector<64xi32> -> vector<8xi32>, vector<32xi32>
llvm.return %metadata : vector<8xi32>
}
@@ -443,7 +443,24 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<128x
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
%metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x64
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 64
: i32, vector<128xi32> -> vector<16xi32>, vector<64xi32>
llvm.return %metadata : vector<16xi32>
}
+
+// Single-register bundles may be vector<1xi32>.
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(%spdesc: i32, %data: vector<2xi32>) -> vector<1xi32> {
+ // CHECK-LABEL: define <1 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(i32 %0, <2 x i32> %1) {
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: %[[MDATA_I32:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 0
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = bitcast i32 %[[MDATA_I32]] to <1 x i32>
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 1
+ // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i8> %[[CDATA]] to <1 x i32>
+ // CHECK-NEXT: ret <1 x i32> %[[MDATA]]
+ // CHECK-NEXT: }
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
+ : i32, vector<2xi32> -> vector<1xi32>, vector<1xi32>
+ llvm.return %metadata : vector<1xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
index 63589511d9e281..69bc437c92b594 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
@@ -3,7 +3,7 @@
llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: i32) {
// expected-error @below {{Invalid compFactor, element size, and repeat factor combination}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> i32
llvm.return
}
@@ -13,7 +13,7 @@ llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: i32) {
llvm.func @spdecompress_data_too_large(%metadata: i32, %compdata: vector<16xi32>) {
// expected-error @below {{Invalid compFactor, element size, and repeat factor combination}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 32
: i32, vector<16xi32> -> vector<128xi32>
llvm.return
}
@@ -23,7 +23,7 @@ llvm.func @spdecompress_data_too_large(%metadata: i32, %compdata: vector<16xi32>
llvm.func @spdecompress_invalid_comp_factor_elem_size(%metadata: i32, %compdata: vector<2xi32>) {
// expected-error @below {{Invalid compFactor and element size combination}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp4to8 index_size = b4 elem_size = b16 rep_factor = 1
: i32, vector<2xi32> -> vector<4xi32>
llvm.return
}
@@ -33,7 +33,7 @@ llvm.func @spdecompress_invalid_comp_factor_elem_size(%metadata: i32, %compdata:
llvm.func @spdecompress_invalid_index_size(%metadata: i32, %compdata: i32) {
// expected-error @below {{Invalid index size and target combination, target should be at most 4 if index size is 2}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to8 index_size = b2 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return
}
@@ -43,7 +43,7 @@ llvm.func @spdecompress_invalid_index_size(%metadata: i32, %compdata: i32) {
llvm.func @spdecompress_invalid_data_size(%metadata: i32, %compdata: i32) {
// expected-error @below {{Operation attributes and provided output data size doesn't match}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> i32
llvm.return
}
@@ -53,7 +53,7 @@ llvm.func @spdecompress_invalid_data_size(%metadata: i32, %compdata: i32) {
llvm.func @spdecompress_invalid_compressed_data_size(%metadata: i32, %compdata: vector<2xi32>) {
// expected-error @below {{Operation attributes and provided input compressed data size doesn't match}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, vector<2xi32> -> vector<2xi32>
llvm.return
}
@@ -63,7 +63,7 @@ llvm.func @spdecompress_invalid_compressed_data_size(%metadata: i32, %compdata:
llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdata: i32) {
// expected-error @below {{Operation attributes and provided input metadata size doesn't match}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: vector<2xi32>, i32 -> vector<2xi32>
llvm.return
}
@@ -73,7 +73,7 @@ llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdat
llvm.func @spdecompress_invalid_comp_factor(%metadata: i32, %compdata: i32) {
%res = nvvm.spdecompress %metadata, %compdata
// expected-error @below {{expected string or keyword containing one of the following enum values for attribute 'compFactor' [sp1to2, sp1to4, sp1to8, sp1to16, sp2to4, sp2to8, sp2to16, sp4to8, sp4to16]}}
- comp_factor = sp3to4 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp3to4 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return
}
@@ -81,9 +81,9 @@ llvm.func @spdecompress_invalid_comp_factor(%metadata: i32, %compdata: i32) {
// -----
llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vector<[2]xi32>) {
- // expected-error @below {{operand #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
+ // expected-error @below {{operand #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 8
: i32, vector<[2]xi32> -> vector<4xi32>
llvm.return
}
@@ -92,9 +92,9 @@ llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vect
llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: i32) {
%metadata = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
- // expected-error @below {{operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64 of ranks 1, but got 'vector<1x2xi32>'}}
+ // expected-error @below {{operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64 of ranks 1, but got 'vector<1x2xi32>'}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 2
: vector<1x2xi32>, i32 -> i32
llvm.return
}
@@ -102,9 +102,19 @@ llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: i32) {
// -----
llvm.func @spdecompress_scalable_data(%metadata: i32, %compdata: i32) {
- // expected-error @below {{result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
+ // expected-error @below {{result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<[2]xi32>
llvm.return
}
+
+// -----
+
+llvm.func @spdecompress_invalid_rep_factor(%metadata: i32, %compdata: i32) {
+ // expected-error @below {{attribute 'repFactor' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {1, 2, 4, 8, 16, 32, 64}}}
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 128
+ : i32, i32 -> vector<2xi32>
+ llvm.return
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
index f1cc5665b9b70d..c26ad41cd1556d 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -25,7 +25,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -53,7 +53,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 8
: i32, vector<2xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -67,7 +67,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 16
: vector<2xi32>, vector<4xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -81,7 +81,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 32
: vector<4xi32>, vector<8xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
@@ -96,7 +96,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compda
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -110,7 +110,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compda
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 2
: i32, i32 -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -124,7 +124,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compda
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<2xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compda
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 8
: i32, vector<4xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -152,7 +152,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi3
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 16
: vector<2xi32>, vector<8xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
index 38d2bddfdb80b5..0b5c2060554cfb 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 2
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -24,7 +24,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -38,7 +38,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 8
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -52,7 +52,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x16
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 16
: i32, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -66,7 +66,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x32
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 32
: vector<2xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -80,7 +80,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = x64
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 64
: vector<4xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -95,7 +95,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -109,7 +109,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -123,7 +123,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 8
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -137,7 +137,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 16
: vector<2xi32>, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -151,7 +151,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 32
: vector<4xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -165,7 +165,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 64
: vector<8xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -180,7 +180,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x1
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 1
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -194,7 +194,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x2
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 2
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -208,7 +208,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x4
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 4
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -222,7 +222,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x8
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 8
: i32, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -236,7 +236,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compda
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x16
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 16
: i32, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -250,7 +250,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x32
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 32
: vector<2xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -264,7 +264,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = x64
+ comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 64
: vector<4xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -279,7 +279,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -293,7 +293,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 2
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -307,7 +307,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -321,7 +321,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 8
: i32, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -335,7 +335,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 16
: vector<2xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -349,7 +349,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 32
: vector<4xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -363,7 +363,24 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = x64
+ comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 64
: vector<8xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
+
+// Single-register bundles may be vector<1xi32>.
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(%metadata: vector<1xi32>, %compdata: vector<1xi32>) -> vector<1xi32> {
+ // CHECK-LABEL: define <1 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(<1 x i32> %0, <1 x i32> %1) {
+ // CHECK-NEXT: %[[MDATA:[0-9]+]] = bitcast <1 x i32> %0 to i32
+ // CHECK-NEXT: %[[CDATA_I32:[0-9]+]] = bitcast <1 x i32> %1 to i32
+ // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %[[CDATA_I32]] to i16
+ // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %[[MDATA]], <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to <1 x i32>
+ // CHECK-NEXT: ret <1 x i32> %[[DATA]]
+ // CHECK-NEXT: }
+ %res = nvvm.spdecompress %metadata, %compdata
+ comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 2
+ : vector<1xi32>, vector<1xi32> -> vector<1xi32>
+ llvm.return %res : vector<1xi32>
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
index 5e1d0e76fa10d9..3c29445d69c173 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -25,7 +25,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -53,7 +53,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 8
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -67,7 +67,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x16
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 16
: i32, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -81,7 +81,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x32
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 32
: vector<2xi32>, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -95,7 +95,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = x64
+ comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 64
: vector<4xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -110,7 +110,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -125,7 +125,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -139,7 +139,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -153,7 +153,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 8
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -167,7 +167,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 16
: vector<2xi32>, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -181,7 +181,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 32
: vector<4xi32>, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -195,7 +195,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 64
: vector<8xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -210,7 +210,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x1
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -224,7 +224,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x2
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 2
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -238,7 +238,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x4
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 4
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -252,7 +252,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x8
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 8
: i32, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -266,7 +266,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compda
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x16
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 16
: i32, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -280,7 +280,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x32
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 32
: vector<2xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -294,7 +294,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = x64
+ comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 64
: vector<4xi32>, vector<32xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
@@ -309,7 +309,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -323,7 +323,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 2
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -337,7 +337,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -351,7 +351,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 8
: i32, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -365,7 +365,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 16
: vector<2xi32>, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -379,7 +379,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 32
: vector<4xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -393,7 +393,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = x64
+ comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 64
: vector<8xi32>, vector<32xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
index 9be00dbd908606..ec55fd60ce32f2 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -25,7 +25,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 4
: i32, i32 -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -53,7 +53,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 8
: i32, vector<2xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -67,7 +67,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 16
: vector<2xi32>, vector<4xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -81,7 +81,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 32
: vector<4xi32>, vector<8xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -95,7 +95,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 64
: vector<8xi32>, vector<16xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
@@ -110,7 +110,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -124,7 +124,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 2
: i32, i32 -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<2xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -152,7 +152,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 8
: i32, vector<4xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -166,7 +166,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 16
: vector<2xi32>, vector<8xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -180,7 +180,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 32
: vector<4xi32>, vector<16xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
index 3ffd0f43a760b6..e10d68b4eb90c0 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -24,7 +24,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -38,7 +38,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 4
: i32, vector<2xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -52,7 +52,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 8
: vector<2xi32>, vector<4xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -66,7 +66,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 16
: vector<4xi32>, vector<8xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -80,7 +80,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 32
: vector<8xi32>, vector<16xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compda
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -108,7 +108,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compda
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 2
: i32, vector<2xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -122,7 +122,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compda
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<4xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -136,7 +136,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 8
: vector<2xi32>, vector<8xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -150,7 +150,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi3
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 16
: vector<4xi32>, vector<16xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
index c418ec19391395..d680f69a63a2ce 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -24,7 +24,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -38,7 +38,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x4
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 4
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -52,7 +52,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x8
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 8
: i32, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -66,7 +66,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x16
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 16
: vector<2xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -80,7 +80,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x32
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 32
: vector<4xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = x64
+ comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 64
: vector<8xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -109,7 +109,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret i32 %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> i32
llvm.return %res : i32
}
@@ -123,7 +123,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -137,7 +137,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 4
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -151,7 +151,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>,
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 8
: vector<2xi32>, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -165,7 +165,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 16
: vector<4xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -179,7 +179,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 32
: vector<8xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -193,7 +193,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 64
: vector<16xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -207,7 +207,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x1
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -221,7 +221,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x2
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 2
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -235,7 +235,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x4
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 4
: i32, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -249,7 +249,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 8
: i32, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -263,7 +263,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x16
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 16
: vector<2xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -277,7 +277,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x32
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 32
: vector<4xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -291,7 +291,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<8xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = x64
+ comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 64
: vector<8xi32>, vector<64xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
@@ -305,7 +305,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -319,7 +319,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 2
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -333,7 +333,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -347,7 +347,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 8
: vector<2xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -361,7 +361,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 16
: vector<4xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -375,7 +375,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 32
: vector<8xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -389,7 +389,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<16xi3
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = x64
+ comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 64
: vector<16xi32>, vector<64xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
index 89fb641e044b31..ba05f79a539ee0 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
@@ -10,7 +10,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -24,7 +24,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 2
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -38,7 +38,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 4
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -52,7 +52,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>,
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 8
: vector<2xi32>, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -66,7 +66,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 16
: vector<4xi32>, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -80,7 +80,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 32
: vector<8xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 64
: vector<16xi32>, vector<32xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
@@ -108,7 +108,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x1
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 1
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -122,7 +122,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x2
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 2
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -136,7 +136,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x4
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 4
: i32, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -150,7 +150,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x8
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 8
: vector<2xi32>, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -164,7 +164,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x16
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 16
: vector<4xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -178,7 +178,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = x32
+ comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 32
: vector<8xi32>, vector<32xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
index 420abe11bb9858..1bddc6b9ced289 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
@@ -9,7 +9,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -23,7 +23,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 2
: i32, vector<2xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -37,7 +37,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 4
: vector<2xi32>, vector<4xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -51,7 +51,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 8
: vector<4xi32>, vector<8xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -65,7 +65,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 16
: vector<8xi32>, vector<16xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -79,7 +79,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi3
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 32
: vector<16xi32>, vector<32xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
index 7489b33472b463..971468d022319e 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
@@ -9,7 +9,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: ret <2 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x1
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 1
: i32, i32 -> vector<2xi32>
llvm.return %res : vector<2xi32>
}
@@ -23,7 +23,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: ret <4 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x2
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 2
: i32, vector<2xi32> -> vector<4xi32>
llvm.return %res : vector<4xi32>
}
@@ -37,7 +37,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>,
// CHECK-NEXT: ret <8 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x4
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 4
: vector<2xi32>, vector<4xi32> -> vector<8xi32>
llvm.return %res : vector<8xi32>
}
@@ -51,7 +51,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>,
// CHECK-NEXT: ret <16 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x8
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 8
: vector<4xi32>, vector<8xi32> -> vector<16xi32>
llvm.return %res : vector<16xi32>
}
@@ -65,7 +65,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>
// CHECK-NEXT: ret <32 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x16
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 16
: vector<8xi32>, vector<16xi32> -> vector<32xi32>
llvm.return %res : vector<32xi32>
}
@@ -79,7 +79,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32
// CHECK-NEXT: ret <64 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x32
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 32
: vector<16xi32>, vector<32xi32> -> vector<64xi32>
llvm.return %res : vector<64xi32>
}
@@ -93,7 +93,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<32xi32
// CHECK-NEXT: ret <128 x i32> %[[DATA]]
// CHECK-NEXT: }
%res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = x64
+ comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 64
: vector<32xi32>, vector<64xi32> -> vector<128xi32>
llvm.return %res : vector<128xi32>
}
>From 2803e9a4f0f48f2078ffafd38c2f85fbb0e323af Mon Sep 17 00:00:00 2001
From: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: Tue, 20 Oct 2026 13:12:33 +0200
Subject: [PATCH 3/4] [MLIR][NVVM] Align sp{de}compress Ops with NVVM IR
intrinsics
---
mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 211 ++-----
mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 126 ++--
.../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 80 +--
.../LLVMIR/nvvm/spcompress-invalid.mlir | 101 ++--
.../Target/LLVMIR/nvvm/spcompress-sp2to4.mlir | 493 +++++++---------
.../LLVMIR/nvvm/spdecompress-invalid.mlir | 137 +++--
.../LLVMIR/nvvm/spdecompress-sp1to16.mlir | 212 +++----
.../LLVMIR/nvvm/spdecompress-sp1to2.mlir | 519 +++++++----------
.../LLVMIR/nvvm/spdecompress-sp1to4.mlir | 538 ++++++++----------
.../LLVMIR/nvvm/spdecompress-sp1to8.mlir | 250 ++++----
.../LLVMIR/nvvm/spdecompress-sp2to16.mlir | 210 +++----
.../LLVMIR/nvvm/spdecompress-sp2to4.mlir | 534 ++++++++---------
.../LLVMIR/nvvm/spdecompress-sp2to8.mlir | 248 ++++----
.../LLVMIR/nvvm/spdecompress-sp4to16.mlir | 114 ++--
.../LLVMIR/nvvm/spdecompress-sp4to8.mlir | 133 ++---
15 files changed, 1633 insertions(+), 2273 deletions(-)
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index d0882b666488c7..ce15283e5e69c8 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -7204,118 +7204,55 @@ def NVVM_Tcgen05MMABlockScaleDecompressBOp :
// NVVM spcompress and spdecompress Ops
//===----------------------------------------------------------------------===//
-// Structured sparsity factor: spXtoY keeps X out of every Y elements.
-def SPFactor1To2 : I32EnumAttrCase<"SP1TO2", 0, "sp1to2">;
-def SPFactor1To4 : I32EnumAttrCase<"SP1TO4", 1, "sp1to4">;
-def SPFactor1To8 : I32EnumAttrCase<"SP1TO8", 2, "sp1to8">;
-def SPFactor1To16 : I32EnumAttrCase<"SP1TO16", 3, "sp1to16">;
-def SPFactor2To4 : I32EnumAttrCase<"SP2TO4", 4, "sp2to4">;
-def SPFactor2To8 : I32EnumAttrCase<"SP2TO8", 5, "sp2to8">;
-def SPFactor2To16 : I32EnumAttrCase<"SP2TO16", 6, "sp2to16">;
-def SPFactor4To8 : I32EnumAttrCase<"SP4TO8", 7, "sp4to8">;
-def SPFactor4To16 : I32EnumAttrCase<"SP4TO16", 8, "sp4to16">;
-def SPFactor : I32EnumAttr<"SPFactor", "Structured sparsity factor", [
- SPFactor1To2,
- SPFactor1To4,
- SPFactor1To8,
- SPFactor1To16,
- SPFactor2To4,
- SPFactor2To8,
- SPFactor2To16,
- SPFactor4To8,
- SPFactor4To16,
- ]> {
- let genSpecializedAttr = 0;
- let cppNamespace = "::mlir::NVVM";
-}
-def SPFactorAttr : EnumAttr<NVVM_Dialect, SPFactor, "sp_factor">;
+// Size in bits of each structured sparsity metadata index.
+def SPIdxSizeAttr : ConfinedAttr<I32Attr, [IntIsOneOf<[2, 4]>]>;
-// Structured sparsity metadata index size
-def SPIndexSizeB2 : I32EnumAttrCase<"B2", 2, "b2">;
-def SPIndexSizeB4 : I32EnumAttrCase<"B4", 4, "b4">;
-def SPIndexSize : I32EnumAttr<"SPIndexSize",
- "Structured sparsity metadata index size", [
- SPIndexSizeB2,
- SPIndexSizeB4,
- ]> {
- let genSpecializedAttr = 0;
- let cppNamespace = "::mlir::NVVM";
-}
-def SPIndexSizeAttr : EnumAttr<NVVM_Dialect, SPIndexSize, "sp_index_size">;
+// Size of each structured sparsity group in the dense data.
+def SPNumTgtAttr : ConfinedAttr<I32Attr, [IntIsOneOf<[2, 4, 8, 16]>]>;
-// Structured sparsity element size
-def SPElemSizeB8 : I32EnumAttrCase<"B8", 8, "b8">;
-def SPElemSizeB16 : I32EnumAttrCase<"B16", 16, "b16">;
-def SPElemSize : I32EnumAttr<"SPElemSize", "Structured sparsity element size", [
- SPElemSizeB8,
- SPElemSizeB16,
- ]> {
- let genSpecializedAttr = 0;
- let cppNamespace = "::mlir::NVVM";
-}
-def SPElemSizeAttr : EnumAttr<NVVM_Dialect, SPElemSize, "sp_elem_size">;
-
-// Structured sparsity repetition factor
-def SPRepFactorAttr : ConfinedAttr<I32Attr, [
- IntIsOneOf<[1, 2, 4, 8, 16, 32, 64]>]>;
-
-// spcompress only supports the 2:4 sparsity factor.
-def SPCompressFactorAttr : ConfinedAttr<SPFactorAttr, [
- EnumAttrIsOneOf<SPFactorAttr, [
- SPFactor2To4,
- ]>
- ]>;
+// Dense and compressed data are vectors of 8-bit or 16-bit elements.
+defvar SPElemVectorType = FixedVectorOfRankAndType<[1], [I8, I16]>;
-// Register bundles are i32 or fixed-length, rank-1 vectors of i32. A
+// Metadata is a bundle of 32-bit registers: i32 or a vector of i32. A
// single-register bundle may be either i32 or vector<1xi32>.
-defvar SPDataType = FixedVectorOfRankAndLengthAndType<[1],
- [2, 4, 8, 16, 32, 64, 128], [I32]>;
-defvar SPRegType = AnyTypeOf<[I32,
- FixedVectorOfRankAndLengthAndType<[1], [1, 2, 4, 8, 16, 32, 64], [I32]>]>;
+defvar SPMetadataType = AnyTypeOf<[I32,
+ FixedVectorOfRankAndLengthAndType<[1], [1, 2, 4, 8, 16, 32], [I32]>]>;
def NVVM_SPCompressOp : NVVM_Op<"spcompress",
[Pure, NVVMRequiresSMa<[107]>]> {
let summary = "Compress dense vector to structured sparse vector";
let description = [{
Compresses elements from a dense vector `data` into a structured sparse
- vector `compressed_data`. The indices of the selected elements are
- returned in `metadata`.
+ vector `compressed_data` using the 2:4 sparsity pattern: 2 out of every
+ 4 elements of `data` are selected. The indices of the selected elements
+ are returned in `metadata`.
- All vectors are bundles of 32-bit registers. A single-register bundle may
- be either `i32` or `vector<1xi32>`. The elements are packed into these
- registers according to `elemSize`.
+ The element size (8 or 16 bits) is given by the element type of `data`
+ and `compressed_data`. `data` must occupy `2 * repFactor` 32-bit
+ registers, where the repeat factor `repFactor` is a power of two from 1
+ to 64.
Arguments:
- `spDesc`: Sparsity descriptor specifying the selection operation and the
element data type.
- - `data`: Input dense vector of `2 * repFactor` registers containing the
- elements to be compressed.
- - `compFactor`: Compression factor. Only `sp2to4` is supported.
- - `indexSize`: Size in bits of each metadata index (`b2` or `b4`).
- - `elemSize`: Size in bits of each element in `data` (`b8` or `b16`).
- - `repFactor`: Repeat factor of the operation (a power of two from 1 to 64).
+ - `data`: Dense vector containing the elements to be compressed.
+ - `idxSize`: Size in bits of each metadata index (2 or 4).
Results:
- `metadata`: Indices of the selected elements, stored in
- `ceil(repFactor * indexSize / elemSize)` registers.
- - `compressed_data`: Selected elements, stored in `repFactor` registers.
+ `ceil(repFactor * idxSize / elemSize)` 32-bit registers. A single
+ register may be either `i32` or `vector<1xi32>`.
+ - `compressed_data`: Selected elements; half as many as in `data`.
Examples:
```mlir
// 8-bit elements, 2-bit indices, repeat factor of 1.
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
-
- // 8-bit elements, 4-bit indices, repeat factor of 2.
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<2xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<4xi8>
// 16-bit elements, 4-bit indices, repeat factor of 8.
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 8
- : i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<32xi16> -> vector<2xi32>, vector<16xi16>
```
[For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-spcompress)
@@ -7323,23 +7260,16 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
let arguments = (ins
I32:$spDesc,
- SPDataType:$data,
- SPCompressFactorAttr:$compFactor,
- SPIndexSizeAttr:$indexSize,
- SPElemSizeAttr:$elemSize,
- SPRepFactorAttr:$repFactor);
+ SPElemVectorType:$data,
+ SPIdxSizeAttr:$idxSize);
let results = (outs
- SPRegType:$metadata,
- SPRegType:$compressed_data);
+ SPMetadataType:$metadata,
+ SPElemVectorType:$compressed_data);
let assemblyFormat = [{
- $spDesc `,` $data
- `comp_factor` `=` enum($compFactor)
- `index_size` `=` enum($indexSize)
- `elem_size` `=` enum($elemSize)
- `rep_factor` `=` $repFactor
- attr-dict `:` type(operands) `->` type($metadata) `,` type($compressed_data)
+ $spDesc `,` $data `idx_size` `=` $idxSize attr-dict
+ `:` type(operands) `->` type($metadata) `,` type($compressed_data)
}];
let extraClassDeclaration = [{
@@ -7362,79 +7292,62 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
into a dense vector `data`, using the indices stored in `metadata`. Dense
positions not selected by `metadata` are set to zero.
- All vectors are bundles of 32-bit registers. A single-register bundle may
- be either `i32` or `vector<1xi32>`. The elements are packed into these
- registers according to `elemSize`. For a decompression factor
- `spXtoY`, the number of registers in each bundle is:
- - `metadata`: `ceil(X * indexSize * repFactor / 32)`
- - `compressed_data`: `ceil(X * elemSize * repFactor / 32)`
- - `data`: `Y * elemSize * repFactor / 32`
+ `data` consists of `repFactor` groups of `numTgt` elements, and
+ `compressed_data` holds `numSrc` elements for each group, i.e. the
+ sparsity factor is `numSrc:numTgt`. Both `numSrc` and the repeat factor
+ `repFactor` are derived from the vector lengths. The element size
+ `elemSize` (8 or 16 bits) is given by the element type of `data` and
+ `compressed_data`.
The following conditions must hold:
- - `Y * elemSize * repFactor` is between 32 and 4096.
- - `X * elemSize` is at most 32.
- - `indexSize` is `b2` only if `Y` is at most 4.
+ - `numSrc:numTgt` is one of 1:2, 1:4, 1:8, 1:16, 2:4, 2:8, 2:16, 4:8, or
+ 4:16.
+ - `repFactor` is a power of two from 1 to 64.
+ - `numTgt * elemSize * repFactor` is between 32 and 4096.
+ - `numSrc * elemSize` is at most 32.
+ - `idxSize` is 2 only if `numTgt` is at most 4.
+ - `metadata` occupies `ceil(numSrc * idxSize * repFactor / 32)` 32-bit
+ registers. A single register may be either `i32` or `vector<1xi32>`.
Arguments:
- `metadata`: Indices of the selected elements.
- `compressed_data`: Compressed vector containing the selected elements.
- - `compFactor`: Decompression factor (`sp1to2`, `sp1to4`, `sp1to8`,
- `sp1to16`, `sp2to4`, `sp2to8`, `sp2to16`, `sp4to8`, or `sp4to16`).
- - `indexSize`: Size in bits of each metadata index (`b2` or `b4`).
- - `elemSize`: Size in bits of each element (`b8` or `b16`).
- - `repFactor`: Repeat factor of the operation (a power of two from 1 to 64).
+ - `idxSize`: Size in bits of each metadata index (2 or 4).
+ - `numTgt`: Size of each group in `data` (2, 4, 8, or 16).
Results:
- - `data`: Output dense vector containing the decompressed elements.
+ - `data`: Dense vector containing the decompressed elements.
Examples:
```mlir
- // 8-bit elements, 2-bit indices, repeat factor of 1.
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, i32 -> i32
-
- // 8-bit elements, 4-bit indices, repeat factor of 2.
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<2xi32>
-
- // 16-bit elements, 4-bit indices, repeat factor of 64.
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 64
- : vector<16xi32>, vector<64xi32> -> vector<128xi32>
+ // 2:4 sparsity, 8-bit elements, 2-bit indices, repeat factor of 1.
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi8>
+
+ // 2:4 sparsity, 16-bit elements, 4-bit indices, repeat factor of 64.
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<16xi32>, vector<128xi16> -> vector<256xi16>
```
[For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-spdecompress)
}];
let arguments = (ins
- SPRegType:$metadata,
- SPRegType:$compressed_data,
- SPFactorAttr:$compFactor,
- SPIndexSizeAttr:$indexSize,
- SPElemSizeAttr:$elemSize,
- SPRepFactorAttr:$repFactor);
+ SPMetadataType:$metadata,
+ SPElemVectorType:$compressed_data,
+ SPIdxSizeAttr:$idxSize,
+ SPNumTgtAttr:$numTgt);
let results = (outs
- AnyTypeOf<[I32,
- FixedVectorOfRankAndLengthAndType<[1],
- [1, 2, 4, 8, 16, 32, 64, 128], [I32]>]>:$data);
+ SPElemVectorType:$data);
let assemblyFormat = [{
$metadata `,` $compressed_data
- `comp_factor` `=` enum($compFactor)
- `index_size` `=` enum($indexSize)
- `elem_size` `=` enum($elemSize)
- `rep_factor` `=` $repFactor
- attr-dict `:` type($metadata) `,` type($compressed_data) `->` type($data)
+ `idx_size` `=` $idxSize `num_tgt` `=` $numTgt attr-dict
+ `:` type($metadata) `,` type($compressed_data) `->` type($data)
}];
let extraClassDeclaration = [{
- // Returns the {source, target} group sizes of `compFactor`, e.g. {2, 4}
- // for sp2to4.
- std::pair<unsigned, unsigned> getCompFactorSizes();
-
static void lowerToLLVMIR(Operation &op, LLVM::ModuleTranslation &mt,
llvm::IRBuilderBase &builder);
}];
diff --git a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
index 482ae05a6350aa..b131e975670372 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
@@ -7074,90 +7074,88 @@ LogicalResult Tcgen05LdRedOp::verify() {
// spcompress and spdecompress Ops
//===----------------------------------------------------------------------===//
-// Returns the number of 32-bit registers in a register bundle, which is either
-// an i32 or a vector of i32.
+// Returns the number of 32-bit registers in a metadata register bundle, which
+// is either an i32 or a vector of i32.
static unsigned getNumSPRegisters(Type type) {
if (auto vecTy = dyn_cast<VectorType>(type))
return vecTy.getNumElements();
return 1;
}
-std::pair<unsigned, unsigned> SPDecompressOp::getCompFactorSizes() {
- switch (getCompFactor()) {
- case NVVM::SPFactor::SP1TO2:
- return {1, 2};
- case NVVM::SPFactor::SP1TO4:
- return {1, 4};
- case NVVM::SPFactor::SP1TO8:
- return {1, 8};
- case NVVM::SPFactor::SP1TO16:
- return {1, 16};
- case NVVM::SPFactor::SP2TO4:
- return {2, 4};
- case NVVM::SPFactor::SP2TO8:
- return {2, 8};
- case NVVM::SPFactor::SP2TO16:
- return {2, 16};
- case NVVM::SPFactor::SP4TO8:
- return {4, 8};
- case NVVM::SPFactor::SP4TO16:
- return {4, 16};
- }
- llvm_unreachable("Invalid SPFactor");
+// The repeat factor of spcompress and spdecompress is a power of two up to 64.
+static bool isValidSPRepFactor(unsigned repFactor) {
+ return llvm::isPowerOf2_32(repFactor) && repFactor <= 64;
}
LogicalResult SPCompressOp::verify() {
- unsigned repFactor = getRepFactor();
- unsigned indexSize = static_cast<unsigned>(getIndexSize());
- unsigned elemSize = static_cast<unsigned>(getElemSize());
-
- if (getNumSPRegisters(getData().getType()) != 2 * repFactor)
- return emitError(
- "Operation attributes and provided input data size doesn't match");
-
- if (getNumSPRegisters(getCompressedData().getType()) != repFactor)
- return emitError("Operation attributes and provided output compressed data "
- "size doesn't match");
+ auto dataTy = cast<VectorType>(getData().getType());
+ auto compressedTy = cast<VectorType>(getCompressedData().getType());
+ if (dataTy.getElementType() != compressedTy.getElementType())
+ return emitOpError(
+ "expects data and compressed data to have the same element type");
+
+ // data occupies 2 * repFactor 32-bit registers.
+ unsigned elemSize = dataTy.getElementTypeBitWidth();
+ unsigned dataBits = dataTy.getNumElements() * elemSize;
+ unsigned repFactor = dataBits / 64;
+ if (dataBits % 64 != 0 || !isValidSPRepFactor(repFactor))
+ return emitOpError("expects data to occupy 2 * repFactor 32-bit "
+ "registers, where repFactor is a power of two up to 64");
+
+ // spcompress only supports the 2:4 sparsity factor.
+ if (2 * compressedTy.getNumElements() != dataTy.getNumElements())
+ return emitOpError(
+ "expects compressed data to have half as many elements as data");
- if (getNumSPRegisters(getMetadata().getType()) !=
- llvm::divideCeil(repFactor * indexSize, elemSize))
- return emitError(
- "Operation attributes and provided output metadata size doesn't match");
+ unsigned numMetadataRegs =
+ llvm::divideCeil(repFactor * getIdxSize(), elemSize);
+ if (getNumSPRegisters(getMetadata().getType()) != numMetadataRegs)
+ return emitOpError("expects metadata to occupy ")
+ << numMetadataRegs << " 32-bit register(s)";
return success();
}
LogicalResult SPDecompressOp::verify() {
- unsigned repFactor = getRepFactor();
- unsigned indexSize = static_cast<unsigned>(getIndexSize());
- unsigned elemSize = static_cast<unsigned>(getElemSize());
- auto [numSrc, numTgt] = getCompFactorSizes();
-
- unsigned dataBits = numTgt * elemSize * repFactor;
+ auto dataTy = cast<VectorType>(getData().getType());
+ auto compressedTy = cast<VectorType>(getCompressedData().getType());
+ if (dataTy.getElementType() != compressedTy.getElementType())
+ return emitOpError(
+ "expects data and compressed data to have the same element type");
+
+ // data holds repFactor groups of numTgt elements, and compressed data holds
+ // numSrc elements for each of those groups.
+ unsigned idxSize = getIdxSize();
+ unsigned numTgt = getNumTgt();
+ unsigned numData = dataTy.getNumElements();
+ unsigned numCompressed = compressedTy.getNumElements();
+ unsigned repFactor = numData / numTgt;
+ if (numData % numTgt != 0 || !isValidSPRepFactor(repFactor))
+ return emitOpError("expects data to have repFactor * num_tgt elements, "
+ "where repFactor is a power of two up to 64");
+
+ unsigned numSrc = numCompressed / repFactor;
+ if (numCompressed % repFactor != 0 ||
+ !llvm::is_contained({1u, 2u, 4u}, numSrc) || numSrc >= numTgt)
+ return emitOpError("unsupported sparsity factor: compressed data has ")
+ << numCompressed << " elements for " << repFactor << " group(s) of "
+ << numTgt << " elements";
+
+ unsigned elemSize = dataTy.getElementTypeBitWidth();
+ unsigned dataBits = numData * elemSize;
if (dataBits < 32 || dataBits > 4096)
- return emitError(
- "Invalid compFactor, element size, and repeat factor combination");
+ return emitOpError("expects data to be between 32 and 4096 bits");
if (numSrc * elemSize > 32)
- return emitError("Invalid compFactor and element size combination");
-
- if (indexSize == 2 && numTgt > 4)
- return emitError("Invalid index size and target combination, target "
- "should be at most 4 if index size is 2");
+ return emitOpError("expects at most 32 bits of compressed data per group");
- if (getNumSPRegisters(getData().getType()) != dataBits / 32)
- return emitError(
- "Operation attributes and provided output data size doesn't match");
-
- if (getNumSPRegisters(getCompressedData().getType()) !=
- llvm::divideCeil(numSrc * elemSize * repFactor, 32))
- return emitError("Operation attributes and provided input compressed data "
- "size doesn't match");
+ if (idxSize == 2 && numTgt > 4)
+ return emitOpError("expects num_tgt to be at most 4 if idx_size is 2");
- if (getNumSPRegisters(getMetadata().getType()) !=
- llvm::divideCeil(numSrc * indexSize * repFactor, 32))
- return emitError(
- "Operation attributes and provided input metadata size doesn't match");
+ unsigned numMetadataRegs = llvm::divideCeil(numSrc * idxSize * repFactor, 32);
+ if (getNumSPRegisters(getMetadata().getType()) != numMetadataRegs)
+ return emitOpError("expects metadata to occupy ")
+ << numMetadataRegs << " 32-bit register(s)";
return success();
}
diff --git a/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
index 6e84b45d7bb578..cba51344677fbf 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
@@ -634,10 +634,9 @@ void NVVM::FmaOp::lowerFmaToLLVMIR(Operation &op, LLVM::ModuleTranslation &mt,
}
}
-// Returns the LLVM type the sp{de}compress intrinsics use for a register
-// bundle: i32 for a single register (including vector<1xi32>) and a vector of
-// i32 otherwise.
-static llvm::Type *getSPRegistersType(Type type, llvm::IRBuilderBase &builder) {
+// Returns the LLVM type the sp{de}compress intrinsics use for metadata: i32 for
+// a single register (including vector<1xi32>) and a vector of i32 otherwise.
+static llvm::Type *getSPMetadataType(Type type, llvm::IRBuilderBase &builder) {
auto vecTy = dyn_cast<VectorType>(type);
if (!vecTy || vecTy.getNumElements() == 1)
return builder.getInt32Ty();
@@ -645,75 +644,42 @@ static llvm::Type *getSPRegistersType(Type type, llvm::IRBuilderBase &builder) {
vecTy.getNumElements());
}
-// Returns the register bundle `value` in the type the sp{de}compress
-// intrinsics expect.
-static llvm::Value *lookupSPRegisters(Value value, LLVM::ModuleTranslation &mt,
- llvm::IRBuilderBase &builder) {
- return builder.CreateBitCast(mt.lookupValue(value),
- getSPRegistersType(value.getType(), builder));
-}
-
void NVVM::SPCompressOp::lowerToLLVMIR(Operation &op,
LLVM::ModuleTranslation &mt,
llvm::IRBuilderBase &builder) {
auto thisOp = cast<NVVM::SPCompressOp>(op);
- unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
- unsigned numElems = thisOp.getRepFactor() * 32 / elemSize;
- llvm::Type *elemTy = builder.getIntNTy(elemSize);
-
- // The intrinsic works on vectors with one lane per element: the dense data
- // occupies 2 * repFactor registers and the compressed data repFactor.
- llvm::Value *data =
- builder.CreateBitCast(mt.lookupValue(thisOp.getData()),
- llvm::FixedVectorType::get(elemTy, 2 * numElems));
- llvm::Type *resultTy = llvm::StructType::get(
- getSPRegistersType(thisOp.getMetadata().getType(), builder),
- llvm::FixedVectorType::get(elemTy, numElems));
+ Value metadata = thisOp.getMetadata();
+ Value compressedData = thisOp.getCompressedData();
+ llvm::Type *resultTy =
+ llvm::StructType::get(getSPMetadataType(metadata.getType(), builder),
+ mt.convertType(compressedData.getType()));
llvm::Value *result = createIntrinsicCall(
builder, llvm::Intrinsic::nvvm_spcompress, resultTy,
- {data, mt.lookupValue(thisOp.getSpDesc()),
- builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
- // spcompress only supports the sp2to4 compression factor.
+ {mt.lookupValue(thisOp.getData()), mt.lookupValue(thisOp.getSpDesc()),
+ builder.getInt32(thisOp.getIdxSize()),
+ // spcompress only supports the 2:4 sparsity factor.
builder.getInt32(4)});
- for (auto [idx, res] : llvm::enumerate(thisOp->getResults()))
- mt.mapValue(res) = builder.CreateBitCast(
- builder.CreateExtractValue(result, static_cast<unsigned>(idx)),
- mt.convertType(res.getType()));
+ mt.mapValue(metadata) =
+ builder.CreateBitCast(builder.CreateExtractValue(result, 0),
+ mt.convertType(metadata.getType()));
+ mt.mapValue(compressedData) = builder.CreateExtractValue(result, 1);
}
void NVVM::SPDecompressOp::lowerToLLVMIR(Operation &op,
LLVM::ModuleTranslation &mt,
llvm::IRBuilderBase &builder) {
auto thisOp = cast<NVVM::SPDecompressOp>(op);
- auto [numSrc, numTgt] = thisOp.getCompFactorSizes();
- unsigned elemSize = static_cast<unsigned>(thisOp.getElemSize());
- unsigned repFactor = thisOp.getRepFactor();
- llvm::Type *elemTy = builder.getIntNTy(elemSize);
-
- llvm::Value *metadata = lookupSPRegisters(thisOp.getMetadata(), mt, builder);
-
- // The intrinsic works on vectors with one lane per element. Compressed data
- // narrower than 32 bits is carried in the low bits of an i32.
- llvm::Value *compressedData =
- lookupSPRegisters(thisOp.getCompressedData(), mt, builder);
- unsigned compressedBits = numSrc * elemSize * repFactor;
- if (compressedBits < 32)
- compressedData =
- builder.CreateTrunc(compressedData, builder.getIntNTy(compressedBits));
- compressedData = builder.CreateBitCast(
- compressedData, llvm::FixedVectorType::get(elemTy, numSrc * repFactor));
-
- llvm::Value *data = createIntrinsicCall(
+ Value metadata = thisOp.getMetadata();
+ mt.mapValue(thisOp.getData()) = createIntrinsicCall(
builder, llvm::Intrinsic::nvvm_spdecompress,
- llvm::FixedVectorType::get(elemTy, numTgt * repFactor),
- {metadata, compressedData,
- builder.getInt32(static_cast<unsigned>(thisOp.getIndexSize())),
- builder.getInt32(numTgt)});
-
- mt.mapValue(thisOp.getData()) =
- builder.CreateBitCast(data, mt.convertType(thisOp.getData().getType()));
+ mt.convertType(thisOp.getData().getType()),
+ {builder.CreateBitCast(mt.lookupValue(metadata),
+ getSPMetadataType(metadata.getType(), builder)),
+ mt.lookupValue(thisOp.getCompressedData()),
+ builder.getInt32(thisOp.getIdxSize()),
+ builder.getInt32(thisOp.getNumTgt())});
}
namespace {
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
index 248109ade56225..a6bb0d683dc1f6 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
@@ -1,90 +1,99 @@
// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
-llvm.func @spcompress_invalid_data_size(%spdesc: i32, %data: vector<2xi32>) {
- // expected-error @below {{Operation attributes and provided input data size doesn't match}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, vector<2xi32> -> i32, vector<2xi32>
+llvm.func @spcompress_elem_type_mismatch(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op expects data and compressed data to have the same element type}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<4xi16>
llvm.return
}
// -----
-llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<4xi32>) {
- // expected-error @below {{Operation attributes and provided output compressed data size doesn't match}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<4xi32>
+llvm.func @spcompress_data_too_small(%spdesc: i32, %data: vector<4xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op expects data to occupy 2 * repFactor 32-bit registers, where repFactor is a power of two up to 64}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<4xi8> -> i32, vector<2xi8>
llvm.return
}
// -----
-llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<4xi32>) {
- // expected-error @below {{Operation attributes and provided output metadata size doesn't match}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, vector<4xi32> -> vector<2xi32>, vector<2xi32>
+llvm.func @spcompress_rep_factor_not_power_of_2(%spdesc: i32, %data: vector<24xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op expects data to occupy 2 * repFactor 32-bit registers, where repFactor is a power of two up to 64}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<24xi8> -> i32, vector<12xi8>
llvm.return
}
// -----
-llvm.func @spcompress_invalid_elem_size(%spdesc: i32, %data: vector<2xi32>) {
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- // expected-error @below {{expected string or keyword containing one of the following enum values for attribute 'elemSize' [b8, b16]}}
- comp_factor = sp2to4 index_size = b2 elem_size = b32 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
+llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op expects compressed data to have half as many elements as data}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<8xi8>
llvm.return
}
// -----
-llvm.func @spcompress_invalid_comp_factor(%spdesc: i32, %data: vector<2xi32>) {
- // expected-error @below {{attribute 'compFactor' failed to satisfy constraint: Structured sparsity factor whose value is one of {sp2to4}}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
+llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<16xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op expects metadata to occupy 1 32-bit register(s)}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<16xi8> -> vector<2xi32>, vector<8xi8>
llvm.return
}
// -----
-llvm.func @spcompress_scalable_data(%spdesc: i32, %data: vector<[2]xi32>) {
- // expected-error @below {{operand #1 must be fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, vector<[2]xi32> -> i32, i32
+llvm.func @spcompress_invalid_idx_size(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op attribute 'idxSize' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4}}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 3
+ : i32, vector<8xi8> -> i32, vector<4xi8>
llvm.return
}
// -----
-llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<2xi32>) {
- %data = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
- // expected-error @below {{operand #1 must be fixed-length vector of 32-bit signless integer values of length 2/4/8/16/32/64/128 of ranks 1, but got 'vector<1x2xi32>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, vector<1x2xi32> -> i32, i32
+llvm.func @spcompress_invalid_elem_type(%spdesc: i32, %data: vector<2xi32>) {
+ // expected-error @below {{'nvvm.spcompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<2xi32>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<2xi32> -> i32, vector<4xi8>
llvm.return
}
// -----
-llvm.func @spcompress_scalable_compressed_data(%spdesc: i32, %data: vector<4xi32>) {
- // expected-error @below {{result #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<[2]xi32>
+llvm.func @spcompress_scalable_data(%spdesc: i32, %data: vector<[8]xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[8]xi8>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<[8]xi8> -> i32, vector<4xi8>
llvm.return
}
// -----
-llvm.func @spcompress_invalid_rep_factor(%spdesc: i32, %data: vector<2xi32>) {
- // expected-error @below {{attribute 'repFactor' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {1, 2, 4, 8, 16, 32, 64}}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 3
- : i32, vector<2xi32> -> i32, i32
+llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<8xi8>) {
+ %data = builtin.unrealized_conversion_cast %arg : vector<8xi8> to vector<1x8xi8>
+ // expected-error @below {{'nvvm.spcompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<1x8xi8>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<1x8xi8> -> i32, vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_scalable_compressed_data(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op result #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[4]xi8>'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<[4]xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_metadata_type(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.spcompress' op result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32 of ranks 1, but got 'i64'}}
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i64, vector<4xi8>
llvm.return
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
index ee9ab8ae3880df..e29aab087fec97 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
@@ -1,466 +1,379 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: data=2, compressed_data=1, metadata=1
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_1(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=1: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<8xi8>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_1(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i8> %[[CDATA]] to i32
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<4xi8>
llvm.return %metadata : i32
}
-// rpf=2: data=4, compressed_data=2, metadata=1
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_2(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i8> } @llvm.nvvm.spcompress.i32.v8i8.v16i8(<16 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=2: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<16xi8>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_2(i32 %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i8> } @llvm.nvvm.spcompress.i32.v8i8.v16i8(<16 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i8> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<2xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<16xi8> -> i32, vector<8xi8>
llvm.return %metadata : i32
}
-// rpf=4: data=8, compressed_data=4, metadata=1
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <16 x i8> } @llvm.nvvm.spcompress.i32.v16i8.v32i8(<32 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=4: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<32xi8>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <16 x i8> } @llvm.nvvm.spcompress.i32.v16i8.v32i8(<32 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <16 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <16 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i8> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <16 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 4
- : i32, vector<8xi32> -> i32, vector<4xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<32xi8> -> i32, vector<16xi8>
llvm.return %metadata : i32
}
-// rpf=8: data=16, compressed_data=8, metadata=2
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <32 x i8> } @llvm.nvvm.spcompress.v2i32.v32i8.v64i8(<64 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=8: metadata=2 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<64xi8>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <32 x i8> } @llvm.nvvm.spcompress.v2i32.v32i8.v64i8(<64 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i8> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <32 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 8
- : i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<64xi8> -> vector<2xi32>, vector<32xi8>
llvm.return %metadata : vector<2xi32>
}
-// rpf=16: data=32, compressed_data=16, metadata=4
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <64 x i8> } @llvm.nvvm.spcompress.v4i32.v64i8.v128i8(<128 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=16: metadata=4 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<128xi8>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <64 x i8> } @llvm.nvvm.spcompress.v4i32.v64i8.v128i8(<128 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i8> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <64 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 16
- : i32, vector<32xi32> -> vector<4xi32>, vector<16xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<128xi8> -> vector<4xi32>, vector<64xi8>
llvm.return %metadata : vector<4xi32>
}
-// rpf=32: data=64, compressed_data=32, metadata=8
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_32(i32 %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <256 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <128 x i8> } @llvm.nvvm.spcompress.v8i32.v128i8.v256i8(<256 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=32: metadata=8 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<256xi8>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_32(i32 %0, <256 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <128 x i8> } @llvm.nvvm.spcompress.v8i32.v128i8.v256i8(<256 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i8> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <128 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 32
- : i32, vector<64xi32> -> vector<8xi32>, vector<32xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<256xi8> -> vector<8xi32>, vector<128xi8>
llvm.return %metadata : vector<8xi32>
}
-// rpf=64: data=128, compressed_data=64, metadata=16
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_64(i32 %0, <128 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <512 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <256 x i8> } @llvm.nvvm.spcompress.v16i32.v256i8.v512i8(<512 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=64: metadata=16 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<512xi8>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_64(i32 %0, <512 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <256 x i8> } @llvm.nvvm.spcompress.v16i32.v256i8.v512i8(<512 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <16 x i32>, <256 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <16 x i32>, <256 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <256 x i8> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <16 x i32>, <256 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 64
- : i32, vector<128xi32> -> vector<16xi32>, vector<64xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<512xi8> -> vector<16xi32>, vector<256xi8>
llvm.return %metadata : vector<16xi32>
}
-// rpf=1: data=2, compressed_data=1, metadata=1
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=1: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<8xi8>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i8> %[[CDATA]] to i32
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<8xi8> -> i32, vector<4xi8>
llvm.return %metadata : i32
}
-// rpf=2: data=4, compressed_data=2, metadata=1
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i8> } @llvm.nvvm.spcompress.i32.v8i8.v16i8(<16 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=2: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<16xi8>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i8> } @llvm.nvvm.spcompress.i32.v8i8.v16i8(<16 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i8> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<2xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<16xi8> -> i32, vector<8xi8>
llvm.return %metadata : i32
}
-// rpf=4: data=8, compressed_data=4, metadata=2
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <16 x i8> } @llvm.nvvm.spcompress.v2i32.v16i8.v32i8(<32 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=4: metadata=2 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<32xi8>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <16 x i8> } @llvm.nvvm.spcompress.v2i32.v16i8.v32i8(<32 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i8> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <16 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, vector<8xi32> -> vector<2xi32>, vector<4xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<32xi8> -> vector<2xi32>, vector<16xi8>
llvm.return %metadata : vector<2xi32>
}
-// rpf=8: data=16, compressed_data=8, metadata=4
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <32 x i8> } @llvm.nvvm.spcompress.v4i32.v32i8.v64i8(<64 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=8: metadata=4 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<64xi8>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <32 x i8> } @llvm.nvvm.spcompress.v4i32.v32i8.v64i8(<64 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i8> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <32 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 8
- : i32, vector<16xi32> -> vector<4xi32>, vector<8xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<64xi8> -> vector<4xi32>, vector<32xi8>
llvm.return %metadata : vector<4xi32>
}
-// rpf=16: data=32, compressed_data=16, metadata=8
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_16(i32 %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <64 x i8> } @llvm.nvvm.spcompress.v8i32.v64i8.v128i8(<128 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=16: metadata=8 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<128xi8>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_16(i32 %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <64 x i8> } @llvm.nvvm.spcompress.v8i32.v64i8.v128i8(<128 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i8> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <64 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 16
- : i32, vector<32xi32> -> vector<8xi32>, vector<16xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<128xi8> -> vector<8xi32>, vector<64xi8>
llvm.return %metadata : vector<8xi32>
}
-// rpf=32: data=64, compressed_data=32, metadata=16
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_32(i32 %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <256 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <128 x i8> } @llvm.nvvm.spcompress.v16i32.v128i8.v256i8(<256 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=32: metadata=16 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<256xi8>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_32(i32 %0, <256 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <128 x i8> } @llvm.nvvm.spcompress.v16i32.v128i8.v256i8(<256 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i8> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <16 x i32>, <128 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 32
- : i32, vector<64xi32> -> vector<16xi32>, vector<32xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<256xi8> -> vector<16xi32>, vector<128xi8>
llvm.return %metadata : vector<16xi32>
}
-// rpf=64: data=128, compressed_data=64, metadata=32
-llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_64(i32 %0, <128 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <512 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <32 x i32>, <256 x i8> } @llvm.nvvm.spcompress.v32i32.v256i8.v512i8(<512 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=64: metadata=32 register(s)
+llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<512xi8>) -> vector<32xi32> {
+ // CHECK-LABEL: define <32 x i32> @spcompress_elmsz_b8_idxsz_b4_rpf_64(i32 %0, <512 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <32 x i32>, <256 x i8> } @llvm.nvvm.spcompress.v32i32.v256i8.v512i8(<512 x i8> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <32 x i32>, <256 x i8> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <32 x i32>, <256 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <256 x i8> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <32 x i32>, <256 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <32 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 64
- : i32, vector<128xi32> -> vector<32xi32>, vector<64xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<512xi8> -> vector<32xi32>, vector<256xi8>
llvm.return %metadata : vector<32xi32>
}
-// rpf=1: data=2, compressed_data=1, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_1(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <2 x i16> } @llvm.nvvm.spcompress.i32.v2i16.v4i16(<4 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=1: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<4xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_1(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <2 x i16> } @llvm.nvvm.spcompress.i32.v2i16.v4i16(<4 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <2 x i16> %[[CDATA]] to i32
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <2 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<4xi16> -> i32, vector<2xi16>
llvm.return %metadata : i32
}
-// rpf=2: data=4, compressed_data=2, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i16> } @llvm.nvvm.spcompress.i32.v4i16.v8i16(<8 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=2: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<8xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i16> } @llvm.nvvm.spcompress.i32.v4i16.v8i16(<8 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i16> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<2xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi16> -> i32, vector<4xi16>
llvm.return %metadata : i32
}
-// rpf=4: data=8, compressed_data=4, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i16> } @llvm.nvvm.spcompress.i32.v8i16.v16i16(<16 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=4: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<16xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i16> } @llvm.nvvm.spcompress.i32.v8i16.v16i16(<16 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i16> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 4
- : i32, vector<8xi32> -> i32, vector<4xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<16xi16> -> i32, vector<8xi16>
llvm.return %metadata : i32
}
-// rpf=8: data=16, compressed_data=8, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <16 x i16> } @llvm.nvvm.spcompress.i32.v16i16.v32i16(<32 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=8: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<32xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <16 x i16> } @llvm.nvvm.spcompress.i32.v16i16.v32i16(<32 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <16 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <16 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i16> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <16 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 8
- : i32, vector<16xi32> -> i32, vector<8xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<32xi16> -> i32, vector<16xi16>
llvm.return %metadata : i32
}
-// rpf=16: data=32, compressed_data=16, metadata=2
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <32 x i16> } @llvm.nvvm.spcompress.v2i32.v32i16.v64i16(<64 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=16: metadata=2 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<64xi16>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <32 x i16> } @llvm.nvvm.spcompress.v2i32.v32i16.v64i16(<64 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <32 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i16> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <32 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 16
- : i32, vector<32xi32> -> vector<2xi32>, vector<16xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<64xi16> -> vector<2xi32>, vector<32xi16>
llvm.return %metadata : vector<2xi32>
}
-// rpf=32: data=64, compressed_data=32, metadata=4
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_32(i32 %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <64 x i16> } @llvm.nvvm.spcompress.v4i32.v64i16.v128i16(<128 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=32: metadata=4 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<128xi16>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_32(i32 %0, <128 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <64 x i16> } @llvm.nvvm.spcompress.v4i32.v64i16.v128i16(<128 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <64 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i16> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <64 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 32
- : i32, vector<64xi32> -> vector<4xi32>, vector<32xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<128xi16> -> vector<4xi32>, vector<64xi16>
llvm.return %metadata : vector<4xi32>
}
-// rpf=64: data=128, compressed_data=64, metadata=8
-llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_64(i32 %0, <128 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <256 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <128 x i16> } @llvm.nvvm.spcompress.v8i32.v128i16.v256i16(<256 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=64: metadata=8 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<256xi16>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b16_idxsz_b2_rpf_64(i32 %0, <256 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <128 x i16> } @llvm.nvvm.spcompress.v8i32.v128i16.v256i16(<256 x i16> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <128 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i16> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <128 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 64
- : i32, vector<128xi32> -> vector<8xi32>, vector<64xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<256xi16> -> vector<8xi32>, vector<128xi16>
llvm.return %metadata : vector<8xi32>
}
-// rpf=1: data=2, compressed_data=1, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<2xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <2 x i16> } @llvm.nvvm.spcompress.i32.v2i16.v4i16(<4 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=1: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<4xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <2 x i16> } @llvm.nvvm.spcompress.i32.v2i16.v4i16(<4 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <2 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <2 x i16> %[[CDATA]] to i32
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <2 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, vector<2xi32> -> i32, i32
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<4xi16> -> i32, vector<2xi16>
llvm.return %metadata : i32
}
-// rpf=2: data=4, compressed_data=2, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<4xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i16> } @llvm.nvvm.spcompress.i32.v4i16.v8i16(<8 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=2: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<8xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i16> } @llvm.nvvm.spcompress.i32.v4i16.v8i16(<8 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i16> %[[CDATA]] to <2 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, vector<4xi32> -> i32, vector<2xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<8xi16> -> i32, vector<4xi16>
llvm.return %metadata : i32
}
-// rpf=4: data=8, compressed_data=4, metadata=1
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<8xi32>) -> i32 {
- // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i16> } @llvm.nvvm.spcompress.i32.v8i16.v16i16(<16 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=4: metadata=1 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<16xi16>) -> i32 {
+ // CHECK-LABEL: define i32 @spcompress_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <8 x i16> } @llvm.nvvm.spcompress.i32.v8i16.v16i16(<16 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <8 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <8 x i16> %[[CDATA]] to <4 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<8xi32> -> i32, vector<4xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<16xi16> -> i32, vector<8xi16>
llvm.return %metadata : i32
}
-// rpf=8: data=16, compressed_data=8, metadata=2
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<16xi32>) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <16 x i16> } @llvm.nvvm.spcompress.v2i32.v16i16.v32i16(<32 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=8: metadata=2 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<32xi16>) -> vector<2xi32> {
+ // CHECK-LABEL: define <2 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <2 x i32>, <16 x i16> } @llvm.nvvm.spcompress.v2i32.v16i16.v32i16(<32 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <2 x i32>, <16 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <16 x i16> %[[CDATA]] to <8 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <16 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 8
- : i32, vector<16xi32> -> vector<2xi32>, vector<8xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<32xi16> -> vector<2xi32>, vector<16xi16>
llvm.return %metadata : vector<2xi32>
}
-// rpf=16: data=32, compressed_data=16, metadata=4
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<32xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_16(i32 %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <32 x i16> } @llvm.nvvm.spcompress.v4i32.v32i16.v64i16(<64 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=16: metadata=4 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<64xi16>) -> vector<4xi32> {
+ // CHECK-LABEL: define <4 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_16(i32 %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <4 x i32>, <32 x i16> } @llvm.nvvm.spcompress.v4i32.v32i16.v64i16(<64 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <4 x i32>, <32 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <32 x i16> %[[CDATA]] to <16 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <32 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 16
- : i32, vector<32xi32> -> vector<4xi32>, vector<16xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<64xi16> -> vector<4xi32>, vector<32xi16>
llvm.return %metadata : vector<4xi32>
}
-// rpf=32: data=64, compressed_data=32, metadata=8
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<64xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_32(i32 %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <64 x i16> } @llvm.nvvm.spcompress.v8i32.v64i16.v128i16(<128 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=32: metadata=8 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<128xi16>) -> vector<8xi32> {
+ // CHECK-LABEL: define <8 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_32(i32 %0, <128 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <8 x i32>, <64 x i16> } @llvm.nvvm.spcompress.v8i32.v64i16.v128i16(<128 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <8 x i32>, <64 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <64 x i16> %[[CDATA]] to <32 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <64 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 32
- : i32, vector<64xi32> -> vector<8xi32>, vector<32xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<128xi16> -> vector<8xi32>, vector<64xi16>
llvm.return %metadata : vector<8xi32>
}
-// rpf=64: data=128, compressed_data=64, metadata=16
-llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<128xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_64(i32 %0, <128 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i32> %1 to <256 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <128 x i16> } @llvm.nvvm.spcompress.v16i32.v128i16.v256i16(<256 x i16> %[[DATA]], i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+// rpf=64: metadata=16 register(s)
+llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<256xi16>) -> vector<16xi32> {
+ // CHECK-LABEL: define <16 x i32> @spcompress_elmsz_b16_idxsz_b4_rpf_64(i32 %0, <256 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { <16 x i32>, <128 x i16> } @llvm.nvvm.spcompress.v16i32.v128i16.v256i16(<256 x i16> %1, i32 %0, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i16> } %[[RES]], 0
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { <16 x i32>, <128 x i16> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <128 x i16> %[[CDATA]] to <64 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { <16 x i32>, <128 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 64
- : i32, vector<128xi32> -> vector<16xi32>, vector<64xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ : i32, vector<256xi16> -> vector<16xi32>, vector<128xi16>
llvm.return %metadata : vector<16xi32>
}
-// Single-register bundles may be vector<1xi32>.
-llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(%spdesc: i32, %data: vector<2xi32>) -> vector<1xi32> {
- // CHECK-LABEL: define <1 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %[[DATA]], i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+// rpf=1: metadata=1 register(s), returned as vector<1xi32>
+llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(%spdesc: i32, %data: vector<8xi8>) -> vector<1xi32> {
+ // CHECK-LABEL: define <1 x i32> @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call { i32, <4 x i8> } @llvm.nvvm.spcompress.i32.v4i8.v8i8(<8 x i8> %1, i32 %0, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: %[[MDATA_I32:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 0
// CHECK-NEXT: %[[MDATA:[0-9]+]] = bitcast i32 %[[MDATA_I32]] to <1 x i32>
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = extractvalue { i32, <4 x i8> } %[[RES]], 1
- // CHECK-NEXT: %{{[0-9]+}} = bitcast <4 x i8> %[[CDATA]] to <1 x i32>
+ // CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <1 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, vector<2xi32> -> vector<1xi32>, vector<1xi32>
+ %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> vector<1xi32>, vector<4xi8>
llvm.return %metadata : vector<1xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
index 69bc437c92b594..67229f1d4063a1 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
@@ -1,120 +1,135 @@
// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
-llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: i32) {
- // expected-error @below {{Invalid compFactor, element size, and repeat factor combination}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> i32
+llvm.func @spdecompress_elem_type_mismatch(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects data and compressed data to have the same element type}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi16>
llvm.return
}
// -----
-llvm.func @spdecompress_data_too_large(%metadata: i32, %compdata: vector<16xi32>) {
- // expected-error @below {{Invalid compFactor, element size, and repeat factor combination}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 32
- : i32, vector<16xi32> -> vector<128xi32>
+llvm.func @spdecompress_data_not_multiple_of_num_tgt(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects data to have repFactor * num_tgt elements, where repFactor is a power of two up to 64}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<6xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_comp_factor_elem_size(%metadata: i32, %compdata: vector<2xi32>) {
- // expected-error @below {{Invalid compFactor and element size combination}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, vector<2xi32> -> vector<4xi32>
+llvm.func @spdecompress_rep_factor_not_power_of_2(%metadata: i32, %compdata: vector<6xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects data to have repFactor * num_tgt elements, where repFactor is a power of two up to 64}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<6xi8> -> vector<12xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_index_size(%metadata: i32, %compdata: i32) {
- // expected-error @below {{Invalid index size and target combination, target should be at most 4 if index size is 2}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<2xi32>
+llvm.func @spdecompress_unsupported_num_src(%metadata: i32, %compdata: vector<3xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op unsupported sparsity factor: compressed data has 3 elements for 1 group(s) of 4 elements}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<3xi8> -> vector<4xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_data_size(%metadata: i32, %compdata: i32) {
- // expected-error @below {{Operation attributes and provided output data size doesn't match}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> i32
+llvm.func @spdecompress_num_src_equals_num_tgt(%metadata: i32, %compdata: vector<4xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op unsupported sparsity factor: compressed data has 4 elements for 1 group(s) of 4 elements}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<4xi8> -> vector<4xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_compressed_data_size(%metadata: i32, %compdata: vector<2xi32>) {
- // expected-error @below {{Operation attributes and provided input compressed data size doesn't match}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, vector<2xi32> -> vector<2xi32>
+llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: vector<1xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects data to be between 32 and 4096 bits}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<1xi8> -> vector<2xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdata: i32) {
- // expected-error @below {{Operation attributes and provided input metadata size doesn't match}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : vector<2xi32>, i32 -> vector<2xi32>
+llvm.func @spdecompress_data_too_large(%metadata: vector<4xi32>, %compdata: vector<32xi16>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects data to be between 32 and 4096 bits}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<4xi32>, vector<32xi16> -> vector<512xi16>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_comp_factor(%metadata: i32, %compdata: i32) {
- %res = nvvm.spdecompress %metadata, %compdata
- // expected-error @below {{expected string or keyword containing one of the following enum values for attribute 'compFactor' [sp1to2, sp1to4, sp1to8, sp1to16, sp2to4, sp2to8, sp2to16, sp4to8, sp4to16]}}
- comp_factor = sp3to4 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<2xi32>
+llvm.func @spdecompress_compressed_group_too_large(%metadata: i32, %compdata: vector<4xi16>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects at most 32 bits of compressed data per group}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi16> -> vector<8xi16>
llvm.return
}
// -----
-llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vector<[2]xi32>) {
- // expected-error @below {{operand #1 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64 of ranks 1, but got 'vector<[2]xi32>'}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 8
- : i32, vector<[2]xi32> -> vector<4xi32>
+llvm.func @spdecompress_invalid_idx_size_for_num_tgt(%metadata: i32, %compdata: vector<1xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects num_tgt to be at most 4 if idx_size is 2}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 8
+ : i32, vector<1xi8> -> vector<8xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: i32) {
- %metadata = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
- // expected-error @below {{operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64 of ranks 1, but got 'vector<1x2xi32>'}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 2
- : vector<1x2xi32>, i32 -> i32
+llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdata: vector<4xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op expects metadata to occupy 1 32-bit register(s)}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<2xi32>, vector<4xi8> -> vector<8xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_scalable_data(%metadata: i32, %compdata: i32) {
- // expected-error @below {{result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32/64/128 of ranks 1, but got 'vector<[2]xi32>'}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<[2]xi32>
+llvm.func @spdecompress_invalid_idx_size(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op attribute 'idxSize' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4}}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 8 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_num_tgt(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op attribute 'numTgt' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4, 8, 16}}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 3
+ : i32, vector<2xi8> -> vector<6xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vector<[2]xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[2]xi8>'}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<[2]xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: vector<2xi8>) {
+ %metadata = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
+ // expected-error @below {{'nvvm.spdecompress' op operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32 of ranks 1, but got 'vector<1x2xi32>'}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<1x2xi32>, vector<2xi8> -> vector<4xi8>
llvm.return
}
// -----
-llvm.func @spdecompress_invalid_rep_factor(%metadata: i32, %compdata: i32) {
- // expected-error @below {{attribute 'repFactor' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {1, 2, 4, 8, 16, 32, 64}}}
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 128
- : i32, i32 -> vector<2xi32>
+llvm.func @spdecompress_scalable_data(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.spdecompress' op result #0 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[4]xi8>'}}
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<[4]xi8>
llvm.return
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
index c26ad41cd1556d..cc355fb1069163 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
@@ -1,158 +1,122 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <1 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<1xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=8
-llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<2xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=4: metadata=1, compressed_data=1, data=16
-llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<4xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=8: metadata=1, compressed_data=2, data=32
-llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 8
- : i32, vector<2xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<8xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=16: metadata=2, compressed_data=4, data=64
-llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<2xi32>, vector<4xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<2xi32>, vector<16xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=32: metadata=4, compressed_data=8, data=128
-llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<512xi8> {
+ // CHECK-LABEL: define <512 x i8> @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<4xi32>, vector<8xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<4xi32>, vector<32xi8> -> vector<512xi8>
+ llvm.return %res : vector<512xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=8
-llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <1 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<1xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=2: metadata=1, compressed_data=1, data=16
-llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, i32 -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<2xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=4: metadata=1, compressed_data=2, data=32
-llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<2xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<4xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=8: metadata=1, compressed_data=4, data=64
-llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 8
- : i32, vector<4xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<8xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=16: metadata=2, compressed_data=8, data=128
-llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to16 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<2xi32>, vector<8xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<2xi32>, vector<16xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
index 0b5c2060554cfb..2b07f5476fe7cb 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
@@ -1,386 +1,299 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=2: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<2xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<2xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
-// rpf=4: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<4xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<4xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=8: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<8xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 8
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<8xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=16: metadata=1, compressed_data=4, data=8
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=16: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<16xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 16
- : i32, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<16xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=32: metadata=2, compressed_data=8, data=16
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=32: metadata=2 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<32xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(<2 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 32
- : vector<2xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : vector<2xi32>, vector<32xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=64: metadata=4, compressed_data=16, data=32
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=64: metadata=4 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<64xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(<4 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 64
- : vector<4xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : vector<4xi32>, vector<64xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<2xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
-// rpf=4: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<4xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=8: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 8
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<8xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=16: metadata=2, compressed_data=4, data=8
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<2xi32>, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : vector<2xi32>, vector<16xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=32: metadata=4, compressed_data=8, data=16
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<4xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : vector<4xi32>, vector<32xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=64: metadata=8, compressed_data=16, data=32
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b8 rep_factor = 64
- : vector<8xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : vector<8xi32>, vector<64xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i16> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: vector<1xi16>) -> vector<2xi16> {
+ // CHECK-LABEL: define <2 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(i32 %0, <1 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <2 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 1
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<1xi16> -> vector<2xi16>
+ llvm.return %res : vector<2xi16>
}
-// rpf=2: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<2xi16>) -> vector<4xi16> {
+ // CHECK-LABEL: define <4 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 2
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<2xi16> -> vector<4xi16>
+ llvm.return %res : vector<4xi16>
}
-// rpf=4: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<4xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 4
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<4xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=8: metadata=1, compressed_data=4, data=8
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<8xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 8
- : i32, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<8xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=16: metadata=1, compressed_data=8, data=16
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=16: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<16xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 16
- : i32, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<16xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=32: metadata=2, compressed_data=16, data=32
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(<2 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=32: metadata=2 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<32xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(<2 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 32
- : vector<2xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : vector<2xi32>, vector<32xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=64: metadata=4, compressed_data=32, data=64
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(<4 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=64: metadata=4 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<64xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(<4 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b16 rep_factor = 64
- : vector<4xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : vector<4xi32>, vector<64xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=1: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <2 x i16> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi16>) -> vector<2xi16> {
+ // CHECK-LABEL: define <2 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <1 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <2 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<1xi16> -> vector<2xi16>
+ llvm.return %res : vector<2xi16>
}
-// rpf=2: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi16>) -> vector<4xi16> {
+ // CHECK-LABEL: define <4 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<2xi16> -> vector<4xi16>
+ llvm.return %res : vector<4xi16>
}
-// rpf=4: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<4xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=8: metadata=1, compressed_data=4, data=8
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 8
- : i32, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : i32, vector<8xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=16: metadata=2, compressed_data=8, data=16
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<2xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : vector<2xi32>, vector<16xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=32: metadata=4, compressed_data=16, data=32
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 32
- : vector<4xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : vector<4xi32>, vector<32xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=64: metadata=8, compressed_data=32, data=64
-llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(<8 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(<8 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b4 elem_size = b16 rep_factor = 64
- : vector<8xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ : vector<8xi32>, vector<64xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// Single-register bundles may be vector<1xi32>.
-llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(%metadata: vector<1xi32>, %compdata: vector<1xi32>) -> vector<1xi32> {
- // CHECK-LABEL: define <1 x i32> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(<1 x i32> %0, <1 x i32> %1) {
+// rpf=2: metadata=1 register(s), passed as vector<1xi32>
+llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(%metadata: vector<1xi32>, %compdata: vector<2xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(<1 x i32> %0, <2 x i8> %1) {
// CHECK-NEXT: %[[MDATA:[0-9]+]] = bitcast <1 x i32> %0 to i32
- // CHECK-NEXT: %[[CDATA_I32:[0-9]+]] = bitcast <1 x i32> %1 to i32
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %[[CDATA_I32]] to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %[[MDATA]], <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to <1 x i32>
- // CHECK-NEXT: ret <1 x i32> %[[DATA]]
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %[[MDATA]], <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to2 index_size = b2 elem_size = b8 rep_factor = 2
- : vector<1xi32>, vector<1xi32> -> vector<1xi32>
- llvm.return %res : vector<1xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : vector<1xi32>, vector<2xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
index 3c29445d69c173..a65459219aa2ae 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
@@ -1,399 +1,309 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata: vector<1xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(i32 %0, <1 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<1xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<2xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=4: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<4xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<4xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=8: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<8xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 8
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<8xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=16: metadata=1, compressed_data=4, data=16
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v16i8(i32 %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=16: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<16xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(i32 %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v16i8(i32 %0, <16 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 16
- : i32, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<16xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=32: metadata=2, compressed_data=8, data=32
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=32: metadata=2 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<32xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(<2 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 32
- : vector<2xi32>, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<2xi32>, vector<32xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=64: metadata=4, compressed_data=16, data=64
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=64: metadata=4 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<64xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(<4 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b8 rep_factor = 64
- : vector<4xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<4xi32>, vector<64xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <1 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<1xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<2xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=4: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<4xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=8: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 8
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<8xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=16: metadata=2, compressed_data=4, data=16
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<2xi32>, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<2xi32>, vector<16xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=32: metadata=4, compressed_data=8, data=32
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<4xi32>, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<4xi32>, vector<32xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=64: metadata=8, compressed_data=16, data=64
-llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b8 rep_factor = 64
- : vector<8xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<8xi32>, vector<64xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: vector<1xi16>) -> vector<4xi16> {
+ // CHECK-LABEL: define <4 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(i32 %0, <1 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<1xi16> -> vector<4xi16>
+ llvm.return %res : vector<4xi16>
}
-// rpf=2: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<2xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 2
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=4: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<4xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 4
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<4xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=8: metadata=1, compressed_data=4, data=16
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<8xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 8
- : i32, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<8xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=16: metadata=1, compressed_data=8, data=32
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v16i16(i32 %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compdata: vector<16xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(i32 %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v16i16(i32 %0, <16 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 16
- : i32, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<16xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=32: metadata=2, compressed_data=16, data=64
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(<2 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=2 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32>, %compdata: vector<32xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(<2 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 32
- : vector<2xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<2xi32>, vector<32xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=64: metadata=4, compressed_data=32, data=128
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(<4 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=4 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32>, %compdata: vector<64xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(<4 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b2 elem_size = b16 rep_factor = 64
- : vector<4xi32>, vector<32xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<4xi32>, vector<64xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi16>) -> vector<4xi16> {
+ // CHECK-LABEL: define <4 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <1 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<1xi16> -> vector<4xi16>
+ llvm.return %res : vector<4xi16>
}
-// rpf=2: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<2xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=4: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<4xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=8: metadata=1, compressed_data=4, data=16
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 8
- : i32, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<8xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=16: metadata=2, compressed_data=8, data=32
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<2xi32>, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<2xi32>, vector<16xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=32: metadata=4, compressed_data=16, data=64
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 32
- : vector<4xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<4xi32>, vector<32xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=64: metadata=8, compressed_data=32, data=128
-llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(<8 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(<8 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to4 index_size = b4 elem_size = b16 rep_factor = 64
- : vector<8xi32>, vector<32xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<8xi32>, vector<64xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
index ec55fd60ce32f2..b2761590bd2579 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
@@ -1,186 +1,144 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i8
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i8 %[[CDATA_TRUNC]] to <1 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v1i8(i32 %0, <1 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <1 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<1xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<2xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=4: metadata=1, compressed_data=1, data=8
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: i32) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, i32 -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=8: metadata=1, compressed_data=2, data=16
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 8
- : i32, vector<2xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<8xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=16: metadata=2, compressed_data=4, data=32
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<2xi32>, vector<4xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<2xi32>, vector<16xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=32: metadata=4, compressed_data=8, data=64
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<4xi32>, vector<8xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<4xi32>, vector<32xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=64: metadata=8, compressed_data=16, data=128
-llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<512xi8> {
+ // CHECK-LABEL: define <512 x i8> @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b8 rep_factor = 64
- : vector<8xi32>, vector<16xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<8xi32>, vector<64xi8> -> vector<512xi8>
+ llvm.return %res : vector<512xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <1 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v1i16(i32 %0, <1 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<1xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <1 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<1xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=2: metadata=1, compressed_data=1, data=8
-llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, i32 -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<2xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=4: metadata=1, compressed_data=2, data=16
-llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<2xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=8: metadata=1, compressed_data=4, data=32
-llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdata: vector<8xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 8
- : i32, vector<4xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<8xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=16: metadata=2, compressed_data=8, data=64
-llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<2xi32>, vector<8xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<2xi32>, vector<16xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=32: metadata=4, compressed_data=16, data=128
-llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(<4 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp1to8 index_size = b4 elem_size = b16 rep_factor = 32
- : vector<4xi32>, vector<16xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<4xi32>, vector<32xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
index e10d68b4eb90c0..b249cebbcec398 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
@@ -1,156 +1,122 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<2xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<2xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=8
-llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<4xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<4xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=4: metadata=1, compressed_data=2, data=16
-llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<8xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, vector<2xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<8xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=8: metadata=2, compressed_data=4, data=32
-llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=8: metadata=2 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 8
- : vector<2xi32>, vector<4xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<2xi32>, vector<16xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=16: metadata=4, compressed_data=8, data=64
-llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=16: metadata=4 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<4xi32>, vector<8xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<4xi32>, vector<32xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=32: metadata=8, compressed_data=16, data=128
-llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=32: metadata=8 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<512xi8> {
+ // CHECK-LABEL: define <512 x i8> @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<8xi32>, vector<16xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<8xi32>, vector<64xi8> -> vector<512xi8>
+ llvm.return %res : vector<512xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=8
-llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<2xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<2xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=2: metadata=1, compressed_data=2, data=16
-llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<4xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, vector<2xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<4xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=4: metadata=1, compressed_data=4, data=32
-llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<8xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<4xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<8xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=8: metadata=2, compressed_data=8, data=64
-llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=8: metadata=2 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 8
- : vector<2xi32>, vector<8xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<2xi32>, vector<16xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=16: metadata=4, compressed_data=16, data=128
-llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=16: metadata=4 register(s)
+llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<32xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to16 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<4xi32>, vector<16xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<4xi32>, vector<32xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
index d680f69a63a2ce..d5ceb0935e95c0 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
@@ -1,395 +1,309 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata: vector<2xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 1
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<4xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<4xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=4: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<8xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 4
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<8xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=8: metadata=1, compressed_data=4, data=8
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<16xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(i32 %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 8
- : i32, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<16xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=16: metadata=2, compressed_data=8, data=16
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: vector<2xi32>, %compdata: vector<32xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(<2 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 16
- : vector<2xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<2xi32>, vector<32xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=32: metadata=4, compressed_data=16, data=32
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<4xi32>, %compdata: vector<64xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(<4 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 32
- : vector<4xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<4xi32>, vector<64xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=64: metadata=8, compressed_data=32, data=64
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(<8 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v128i8(<8 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<8xi32>, %compdata: vector<128xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(<8 x i32> %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v128i8(<8 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b8 rep_factor = 64
- : vector<8xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<8xi32>, vector<128xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=1
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> i32 {
- // CHECK-LABEL: define i32 @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i8> %[[RES]] to i32
- // CHECK-NEXT: ret i32 %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<2xi8>) -> vector<4xi8> {
+ // CHECK-LABEL: define <4 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> i32
- llvm.return %res : i32
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi8>
+ llvm.return %res : vector<4xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<4xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<4xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=4: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<8xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<8xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=8: metadata=2, compressed_data=4, data=8
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=8: metadata=2 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 8
- : vector<2xi32>, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<2xi32>, vector<16xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=16: metadata=4, compressed_data=8, data=16
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=16: metadata=4 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<4xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<4xi32>, vector<32xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=32: metadata=8, compressed_data=16, data=32
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=32: metadata=8 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<8xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<8xi32>, vector<64xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=64: metadata=16, compressed_data=32, data=64
-llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(<16 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=64: metadata=16 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<128xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(<16 x i32> %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b8 rep_factor = 64
- : vector<16xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<16xi32>, vector<128xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdata: vector<2xi16>) -> vector<4xi16> {
+ // CHECK-LABEL: define <4 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi16> -> vector<4xi16>
+ llvm.return %res : vector<4xi16>
}
-// rpf=2: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdata: vector<4xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 2
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<4xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=4: metadata=1, compressed_data=4, data=8
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdata: vector<8xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 4
- : i32, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<8xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=8: metadata=1, compressed_data=8, data=16
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdata: vector<16xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(i32 %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 8
- : i32, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<16xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=16: metadata=2, compressed_data=16, data=32
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: vector<2xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(<2 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=2 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: vector<2xi32>, %compdata: vector<32xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(<2 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 16
- : vector<2xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<2xi32>, vector<32xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=32: metadata=4, compressed_data=32, data=64
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<4xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(<4 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=4 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<4xi32>, %compdata: vector<64xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(<4 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 32
- : vector<4xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<4xi32>, vector<64xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=64: metadata=8, compressed_data=64, data=128
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<8xi32>, %compdata: vector<64xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(<8 x i32> %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v128i16(<8 x i32> %0, <128 x i16> %[[CDATA]], /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=8 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<8xi32>, %compdata: vector<128xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(<8 x i32> %0, <128 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v128i16(<8 x i32> %0, <128 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b2 elem_size = b16 rep_factor = 64
- : vector<8xi32>, vector<64xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<8xi32>, vector<128xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <4 x i16> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<2xi16>) -> vector<4xi16> {
+ // CHECK-LABEL: define <4 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<2xi16> -> vector<4xi16>
+ llvm.return %res : vector<4xi16>
}
-// rpf=2: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<4xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<4xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=4: metadata=1, compressed_data=4, data=8
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<8xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : i32, vector<8xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=8: metadata=2, compressed_data=8, data=16
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=2 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 8
- : vector<2xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<2xi32>, vector<16xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=16: metadata=4, compressed_data=16, data=32
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=4 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<32xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<4xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<4xi32>, vector<32xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=32: metadata=8, compressed_data=32, data=64
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(<8 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=8 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<64xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(<8 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 32
- : vector<8xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<8xi32>, vector<64xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=64: metadata=16, compressed_data=64, data=128
-llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<64xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(<16 x i32> %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <64 x i32> %1 to <128 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v16i32.v128i16(<16 x i32> %0, <128 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=16 register(s)
+llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<128xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(<16 x i32> %0, <128 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v16i32.v128i16(<16 x i32> %0, <128 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to4 index_size = b4 elem_size = b16 rep_factor = 64
- : vector<16xi32>, vector<64xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<16xi32>, vector<128xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
index ba05f79a539ee0..4015848ccb030a 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
@@ -1,184 +1,144 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA_TRUNC:[0-9]+]] = trunc i32 %1 to i16
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i16 %[[CDATA_TRUNC]] to <2 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<2xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <2 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<2xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=2: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<4xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=4: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<8xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 4
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<8xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=8: metadata=2, compressed_data=4, data=16
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=2 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 8
- : vector<2xi32>, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<2xi32>, vector<16xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=16: metadata=4, compressed_data=8, data=32
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=4 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<4xi32>, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<4xi32>, vector<32xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=32: metadata=8, compressed_data=16, data=64
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=8 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<8xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<8xi32>, vector<64xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=64: metadata=16, compressed_data=32, data=128
-llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(<16 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=16 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32>, %compdata: vector<128xi8>) -> vector<512xi8> {
+ // CHECK-LABEL: define <512 x i8> @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(<16 x i32> %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b8 rep_factor = 64
- : vector<16xi32>, vector<32xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<16xi32>, vector<128xi8> -> vector<512xi8>
+ llvm.return %res : vector<512xi8>
}
-// rpf=1: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <2 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i16> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<2xi16>) -> vector<8xi16> {
+ // CHECK-LABEL: define <8 x i16> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(i32 %0, <2 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 1
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<2xi16> -> vector<8xi16>
+ llvm.return %res : vector<8xi16>
}
-// rpf=2: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <4 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i16> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<4xi16>) -> vector<16xi16> {
+ // CHECK-LABEL: define <16 x i16> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(i32 %0, <4 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 2
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi16> -> vector<16xi16>
+ llvm.return %res : vector<16xi16>
}
-// rpf=4: metadata=1, compressed_data=4, data=16
-llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <8 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i16> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=4: metadata=1 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdata: vector<8xi16>) -> vector<32xi16> {
+ // CHECK-LABEL: define <32 x i16> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(i32 %0, <8 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 4
- : i32, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<8xi16> -> vector<32xi16>
+ llvm.return %res : vector<32xi16>
}
-// rpf=8: metadata=2, compressed_data=8, data=32
-llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <16 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i16> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=8: metadata=2 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>, %compdata: vector<16xi16>) -> vector<64xi16> {
+ // CHECK-LABEL: define <64 x i16> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(<2 x i32> %0, <16 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 8
- : vector<2xi32>, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<2xi32>, vector<16xi16> -> vector<64xi16>
+ llvm.return %res : vector<64xi16>
}
-// rpf=16: metadata=4, compressed_data=16, data=64
-llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <32 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i16> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=16: metadata=4 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32>, %compdata: vector<32xi16>) -> vector<128xi16> {
+ // CHECK-LABEL: define <128 x i16> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(<4 x i32> %0, <32 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 16
- : vector<4xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<4xi32>, vector<32xi16> -> vector<128xi16>
+ llvm.return %res : vector<128xi16>
}
-// rpf=32: metadata=8, compressed_data=32, data=128
-llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(<8 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <64 x i16>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i16> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=32: metadata=8 register(s)
+llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32>, %compdata: vector<64xi16>) -> vector<256xi16> {
+ // CHECK-LABEL: define <256 x i16> @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(<8 x i32> %0, <64 x i16> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp2to8 index_size = b4 elem_size = b16 rep_factor = 32
- : vector<8xi32>, vector<32xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<8xi32>, vector<64xi16> -> vector<256xi16>
+ llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
index 1bddc6b9ced289..a3dad050d5a64b 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
@@ -1,85 +1,67 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=4
-llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<4xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<4xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=2: metadata=1, compressed_data=2, data=8
-llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<8xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, vector<2xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : i32, vector<8xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=4: metadata=2, compressed_data=4, data=16
-llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=4: metadata=2 register(s)
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 4
- : vector<2xi32>, vector<4xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<2xi32>, vector<16xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=8: metadata=4, compressed_data=8, data=32
-llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=8: metadata=4 register(s)
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 8
- : vector<4xi32>, vector<8xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<4xi32>, vector<32xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=16: metadata=8, compressed_data=16, data=64
-llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=16: metadata=8 register(s)
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<8xi32>, vector<16xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<8xi32>, vector<64xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=32: metadata=16, compressed_data=32, data=128
-llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(<16 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=32: metadata=16 register(s)
+llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32>, %compdata: vector<128xi8>) -> vector<512xi8> {
+ // CHECK-LABEL: define <512 x i8> @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(<16 x i32> %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
+ // CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to16 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<16xi32>, vector<32xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<16xi32>, vector<128xi8> -> vector<512xi8>
+ llvm.return %res : vector<512xi8>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
index 971468d022319e..8cda8328b3e99e 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
@@ -1,99 +1,78 @@
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
-// rpf=1: metadata=1, compressed_data=1, data=2
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: i32) -> vector<2xi32> {
- // CHECK-LABEL: define <2 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, i32 %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast i32 %1 to <4 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <8 x i8> %[[RES]] to <2 x i32>
- // CHECK-NEXT: ret <2 x i32> %[[DATA]]
+// rpf=1: metadata=1 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata: vector<4xi8>) -> vector<8xi8> {
+ // CHECK-LABEL: define <8 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(i32 %0, <4 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 1
- : i32, i32 -> vector<2xi32>
- llvm.return %res : vector<2xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi8> -> vector<8xi8>
+ llvm.return %res : vector<8xi8>
}
-// rpf=2: metadata=1, compressed_data=2, data=4
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<2xi32>) -> vector<4xi32> {
- // CHECK-LABEL: define <4 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <2 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <2 x i32> %1 to <8 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <16 x i8> %[[RES]] to <4 x i32>
- // CHECK-NEXT: ret <4 x i32> %[[DATA]]
+// rpf=2: metadata=1 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata: vector<8xi8>) -> vector<16xi8> {
+ // CHECK-LABEL: define <16 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(i32 %0, <8 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 2
- : i32, vector<2xi32> -> vector<4xi32>
- llvm.return %res : vector<4xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<8xi8> -> vector<16xi8>
+ llvm.return %res : vector<16xi8>
}
-// rpf=4: metadata=2, compressed_data=4, data=8
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>, %compdata: vector<4xi32>) -> vector<8xi32> {
- // CHECK-LABEL: define <8 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(<2 x i32> %0, <4 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <4 x i32> %1 to <16 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <32 x i8> %[[RES]] to <8 x i32>
- // CHECK-NEXT: ret <8 x i32> %[[DATA]]
+// rpf=4: metadata=2 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>, %compdata: vector<16xi8>) -> vector<32xi8> {
+ // CHECK-LABEL: define <32 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(<2 x i32> %0, <16 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 4
- : vector<2xi32>, vector<4xi32> -> vector<8xi32>
- llvm.return %res : vector<8xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<2xi32>, vector<16xi8> -> vector<32xi8>
+ llvm.return %res : vector<32xi8>
}
-// rpf=8: metadata=4, compressed_data=8, data=16
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>, %compdata: vector<8xi32>) -> vector<16xi32> {
- // CHECK-LABEL: define <16 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(<4 x i32> %0, <8 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <8 x i32> %1 to <32 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <64 x i8> %[[RES]] to <16 x i32>
- // CHECK-NEXT: ret <16 x i32> %[[DATA]]
+// rpf=8: metadata=4 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>, %compdata: vector<32xi8>) -> vector<64xi8> {
+ // CHECK-LABEL: define <64 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(<4 x i32> %0, <32 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 8
- : vector<4xi32>, vector<8xi32> -> vector<16xi32>
- llvm.return %res : vector<16xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<4xi32>, vector<32xi8> -> vector<64xi8>
+ llvm.return %res : vector<64xi8>
}
-// rpf=16: metadata=8, compressed_data=16, data=32
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>, %compdata: vector<16xi32>) -> vector<32xi32> {
- // CHECK-LABEL: define <32 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(<8 x i32> %0, <16 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <16 x i32> %1 to <64 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <128 x i8> %[[RES]] to <32 x i32>
- // CHECK-NEXT: ret <32 x i32> %[[DATA]]
+// rpf=16: metadata=8 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>, %compdata: vector<64xi8>) -> vector<128xi8> {
+ // CHECK-LABEL: define <128 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(<8 x i32> %0, <64 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 16
- : vector<8xi32>, vector<16xi32> -> vector<32xi32>
- llvm.return %res : vector<32xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<8xi32>, vector<64xi8> -> vector<128xi8>
+ llvm.return %res : vector<128xi8>
}
-// rpf=32: metadata=16, compressed_data=32, data=64
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32>, %compdata: vector<32xi32>) -> vector<64xi32> {
- // CHECK-LABEL: define <64 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(<16 x i32> %0, <32 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <32 x i32> %1 to <128 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <256 x i8> %[[RES]] to <64 x i32>
- // CHECK-NEXT: ret <64 x i32> %[[DATA]]
+// rpf=32: metadata=16 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32>, %compdata: vector<128xi8>) -> vector<256xi8> {
+ // CHECK-LABEL: define <256 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(<16 x i32> %0, <128 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 32
- : vector<16xi32>, vector<32xi32> -> vector<64xi32>
- llvm.return %res : vector<64xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<16xi32>, vector<128xi8> -> vector<256xi8>
+ llvm.return %res : vector<256xi8>
}
-// rpf=64: metadata=32, compressed_data=64, data=128
-llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<32xi32>, %compdata: vector<64xi32>) -> vector<128xi32> {
- // CHECK-LABEL: define <128 x i32> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(<32 x i32> %0, <64 x i32> %1) {
- // CHECK-NEXT: %[[CDATA:[0-9]+]] = bitcast <64 x i32> %1 to <256 x i8>
- // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v32i32.v256i8(<32 x i32> %0, <256 x i8> %[[CDATA]], /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
- // CHECK-NEXT: %[[DATA:[0-9]+]] = bitcast <512 x i8> %[[RES]] to <128 x i32>
- // CHECK-NEXT: ret <128 x i32> %[[DATA]]
+// rpf=64: metadata=32 register(s)
+llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<32xi32>, %compdata: vector<256xi8>) -> vector<512xi8> {
+ // CHECK-LABEL: define <512 x i8> @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(<32 x i32> %0, <256 x i8> %1) {
+ // CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v32i32.v256i8(<32 x i32> %0, <256 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
+ // CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata
- comp_factor = sp4to8 index_size = b4 elem_size = b8 rep_factor = 64
- : vector<32xi32>, vector<64xi32> -> vector<128xi32>
- llvm.return %res : vector<128xi32>
+ %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : vector<32xi32>, vector<256xi8> -> vector<512xi8>
+ llvm.return %res : vector<512xi8>
}
>From f80290adc04879ae1c7e6e940fd029a67697ae4f Mon Sep 17 00:00:00 2001
From: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: Wed, 21 Oct 2026 19:08:56 +0200
Subject: [PATCH 4/4] [MLIR][NVVM] Rename sp{de}compress MLIR Ops to
sparse.{de}compress
---
mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 20 +--
mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 6 +-
.../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 16 +--
.../LLVMIR/nvvm/sparse-compress-invalid.mlir | 99 +++++++++++++
...p2to4.mlir => sparse-compress-sp2to4.mlir} | 58 ++++----
.../nvvm/sparse-decompress-invalid.mlir | 135 ++++++++++++++++++
...16.mlir => sparse-decompress-sp1to16.mlir} | 22 +--
...to2.mlir => sparse-decompress-sp1to2.mlir} | 54 +++----
...to4.mlir => sparse-decompress-sp1to4.mlir} | 56 ++++----
...to8.mlir => sparse-decompress-sp1to8.mlir} | 26 ++--
...16.mlir => sparse-decompress-sp2to16.mlir} | 22 +--
...to4.mlir => sparse-decompress-sp2to4.mlir} | 56 ++++----
...to8.mlir => sparse-decompress-sp2to8.mlir} | 26 ++--
...16.mlir => sparse-decompress-sp4to16.mlir} | 12 +-
...to8.mlir => sparse-decompress-sp4to8.mlir} | 14 +-
.../LLVMIR/nvvm/spcompress-invalid.mlir | 99 -------------
.../LLVMIR/nvvm/spdecompress-invalid.mlir | 135 ------------------
17 files changed, 429 insertions(+), 427 deletions(-)
create mode 100644 mlir/test/Target/LLVMIR/nvvm/sparse-compress-invalid.mlir
rename mlir/test/Target/LLVMIR/nvvm/{spcompress-sp2to4.mlir => sparse-compress-sp2to4.mlir} (90%)
create mode 100644 mlir/test/Target/LLVMIR/nvvm/sparse-decompress-invalid.mlir
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp1to16.mlir => sparse-decompress-sp1to16.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp1to2.mlir => sparse-decompress-sp1to2.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp1to4.mlir => sparse-decompress-sp1to4.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp1to8.mlir => sparse-decompress-sp1to8.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp2to16.mlir => sparse-decompress-sp2to16.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp2to4.mlir => sparse-decompress-sp2to4.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp2to8.mlir => sparse-decompress-sp2to8.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp4to16.mlir => sparse-decompress-sp4to16.mlir} (88%)
rename mlir/test/Target/LLVMIR/nvvm/{spdecompress-sp4to8.mlir => sparse-decompress-sp4to8.mlir} (88%)
delete mode 100644 mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
delete mode 100644 mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index ce15283e5e69c8..ccc7805dd6ae19 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -7201,7 +7201,7 @@ def NVVM_Tcgen05MMABlockScaleDecompressBOp :
}
//===----------------------------------------------------------------------===//
-// NVVM spcompress and spdecompress Ops
+// NVVM sparse.compress and sparse.decompress Ops
//===----------------------------------------------------------------------===//
// Size in bits of each structured sparsity metadata index.
@@ -7218,7 +7218,7 @@ defvar SPElemVectorType = FixedVectorOfRankAndType<[1], [I8, I16]>;
defvar SPMetadataType = AnyTypeOf<[I32,
FixedVectorOfRankAndLengthAndType<[1], [1, 2, 4, 8, 16, 32], [I32]>]>;
-def NVVM_SPCompressOp : NVVM_Op<"spcompress",
+def NVVM_SparseCompressOp : NVVM_Op<"sparse.compress",
[Pure, NVVMRequiresSMa<[107]>]> {
let summary = "Compress dense vector to structured sparse vector";
let description = [{
@@ -7247,11 +7247,13 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
Examples:
```mlir
// 8-bit elements, 2-bit indices, repeat factor of 1.
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data
+ idx_size = 2
: i32, vector<8xi8> -> i32, vector<4xi8>
// 16-bit elements, 4-bit indices, repeat factor of 8.
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data
+ idx_size = 4
: i32, vector<32xi16> -> vector<2xi32>, vector<16xi16>
```
@@ -7280,11 +7282,11 @@ def NVVM_SPCompressOp : NVVM_Op<"spcompress",
let hasVerifier = 1;
string llvmBuilder = [{
- NVVM::SPCompressOp::lowerToLLVMIR(*op, moduleTranslation, builder);
+ NVVM::SparseCompressOp::lowerToLLVMIR(*op, moduleTranslation, builder);
}];
}
-def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
+def NVVM_SparseDecompressOp : NVVM_Op<"sparse.decompress",
[Pure, NVVMRequiresSMa<[107]>]> {
let summary = "Decompress structured sparse vector to dense vector";
let description = [{
@@ -7321,11 +7323,11 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
Examples:
```mlir
// 2:4 sparsity, 8-bit elements, 2-bit indices, repeat factor of 1.
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<2xi8> -> vector<4xi8>
// 2:4 sparsity, 16-bit elements, 4-bit indices, repeat factor of 64.
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<16xi32>, vector<128xi16> -> vector<256xi16>
```
@@ -7355,7 +7357,7 @@ def NVVM_SPDecompressOp : NVVM_Op<"spdecompress",
let hasVerifier = 1;
string llvmBuilder = [{
- NVVM::SPDecompressOp::lowerToLLVMIR(*op, moduleTranslation, builder);
+ NVVM::SparseDecompressOp::lowerToLLVMIR(*op, moduleTranslation, builder);
}];
}
diff --git a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
index b131e975670372..d7d0e6f329f138 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
@@ -7071,7 +7071,7 @@ LogicalResult Tcgen05LdRedOp::verify() {
}
//===----------------------------------------------------------------------===//
-// spcompress and spdecompress Ops
+// sparse.compress and sparse.decompress Ops
//===----------------------------------------------------------------------===//
// Returns the number of 32-bit registers in a metadata register bundle, which
@@ -7087,7 +7087,7 @@ static bool isValidSPRepFactor(unsigned repFactor) {
return llvm::isPowerOf2_32(repFactor) && repFactor <= 64;
}
-LogicalResult SPCompressOp::verify() {
+LogicalResult SparseCompressOp::verify() {
auto dataTy = cast<VectorType>(getData().getType());
auto compressedTy = cast<VectorType>(getCompressedData().getType());
if (dataTy.getElementType() != compressedTy.getElementType())
@@ -7116,7 +7116,7 @@ LogicalResult SPCompressOp::verify() {
return success();
}
-LogicalResult SPDecompressOp::verify() {
+LogicalResult SparseDecompressOp::verify() {
auto dataTy = cast<VectorType>(getData().getType());
auto compressedTy = cast<VectorType>(getCompressedData().getType());
if (dataTy.getElementType() != compressedTy.getElementType())
diff --git a/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
index cba51344677fbf..0adf648857fa4e 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
@@ -644,10 +644,10 @@ static llvm::Type *getSPMetadataType(Type type, llvm::IRBuilderBase &builder) {
vecTy.getNumElements());
}
-void NVVM::SPCompressOp::lowerToLLVMIR(Operation &op,
- LLVM::ModuleTranslation &mt,
- llvm::IRBuilderBase &builder) {
- auto thisOp = cast<NVVM::SPCompressOp>(op);
+void NVVM::SparseCompressOp::lowerToLLVMIR(Operation &op,
+ LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder) {
+ auto thisOp = cast<NVVM::SparseCompressOp>(op);
Value metadata = thisOp.getMetadata();
Value compressedData = thisOp.getCompressedData();
llvm::Type *resultTy =
@@ -667,10 +667,10 @@ void NVVM::SPCompressOp::lowerToLLVMIR(Operation &op,
mt.mapValue(compressedData) = builder.CreateExtractValue(result, 1);
}
-void NVVM::SPDecompressOp::lowerToLLVMIR(Operation &op,
- LLVM::ModuleTranslation &mt,
- llvm::IRBuilderBase &builder) {
- auto thisOp = cast<NVVM::SPDecompressOp>(op);
+void NVVM::SparseDecompressOp::lowerToLLVMIR(Operation &op,
+ LLVM::ModuleTranslation &mt,
+ llvm::IRBuilderBase &builder) {
+ auto thisOp = cast<NVVM::SparseDecompressOp>(op);
Value metadata = thisOp.getMetadata();
mt.mapValue(thisOp.getData()) = createIntrinsicCall(
builder, llvm::Intrinsic::nvvm_spdecompress,
diff --git a/mlir/test/Target/LLVMIR/nvvm/sparse-compress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-compress-invalid.mlir
new file mode 100644
index 00000000000000..958805e80abd3a
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-compress-invalid.mlir
@@ -0,0 +1,99 @@
+// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
+
+llvm.func @spcompress_elem_type_mismatch(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op expects data and compressed data to have the same element type}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<4xi16>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_data_too_small(%spdesc: i32, %data: vector<4xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op expects data to occupy 2 * repFactor 32-bit registers, where repFactor is a power of two up to 64}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<4xi8> -> i32, vector<2xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_rep_factor_not_power_of_2(%spdesc: i32, %data: vector<24xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op expects data to occupy 2 * repFactor 32-bit registers, where repFactor is a power of two up to 64}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<24xi8> -> i32, vector<12xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op expects compressed data to have half as many elements as data}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<8xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<16xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op expects metadata to occupy 1 32-bit register(s)}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
+ : i32, vector<16xi8> -> vector<2xi32>, vector<8xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_idx_size(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op attribute 'idxSize' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4}}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 3
+ : i32, vector<8xi8> -> i32, vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_elem_type(%spdesc: i32, %data: vector<2xi32>) {
+ // expected-error @below {{'nvvm.sparse.compress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<2xi32>'}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<2xi32> -> i32, vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_scalable_data(%spdesc: i32, %data: vector<[8]xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[8]xi8>'}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<[8]xi8> -> i32, vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<8xi8>) {
+ %data = builtin.unrealized_conversion_cast %arg : vector<8xi8> to vector<1x8xi8>
+ // expected-error @below {{'nvvm.sparse.compress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<1x8xi8>'}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<1x8xi8> -> i32, vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_scalable_compressed_data(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op result #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[4]xi8>'}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i32, vector<[4]xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spcompress_invalid_metadata_type(%spdesc: i32, %data: vector<8xi8>) {
+ // expected-error @below {{'nvvm.sparse.compress' op result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32 of ranks 1, but got 'i64'}}
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
+ : i32, vector<8xi8> -> i64, vector<4xi8>
+ llvm.return
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-compress-sp2to4.mlir
similarity index 90%
rename from mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-compress-sp2to4.mlir
index e29aab087fec97..1d8d9510690fa8 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spcompress-sp2to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-compress-sp2to4.mlir
@@ -8,7 +8,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<8xi8>)
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<8xi8> -> i32, vector<4xi8>
llvm.return %metadata : i32
}
@@ -21,7 +21,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<16xi8>
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<16xi8> -> i32, vector<8xi8>
llvm.return %metadata : i32
}
@@ -34,7 +34,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<32xi8>
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <16 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<32xi8> -> i32, vector<16xi8>
llvm.return %metadata : i32
}
@@ -47,7 +47,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<64xi8>
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <32 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<64xi8> -> vector<2xi32>, vector<32xi8>
llvm.return %metadata : vector<2xi32>
}
@@ -60,7 +60,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<128xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <64 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<128xi8> -> vector<4xi32>, vector<64xi8>
llvm.return %metadata : vector<4xi32>
}
@@ -73,7 +73,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<256xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <128 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<256xi8> -> vector<8xi32>, vector<128xi8>
llvm.return %metadata : vector<8xi32>
}
@@ -86,7 +86,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<512xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <16 x i32>, <256 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<512xi8> -> vector<16xi32>, vector<256xi8>
llvm.return %metadata : vector<16xi32>
}
@@ -99,7 +99,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<8xi8>)
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<8xi8> -> i32, vector<4xi8>
llvm.return %metadata : i32
}
@@ -112,7 +112,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<16xi8>
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i8> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<16xi8> -> i32, vector<8xi8>
llvm.return %metadata : i32
}
@@ -125,7 +125,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<32xi8>
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <16 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<32xi8> -> vector<2xi32>, vector<16xi8>
llvm.return %metadata : vector<2xi32>
}
@@ -138,7 +138,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<64xi8>
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <32 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<64xi8> -> vector<4xi32>, vector<32xi8>
llvm.return %metadata : vector<4xi32>
}
@@ -151,7 +151,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<128xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <64 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<128xi8> -> vector<8xi32>, vector<64xi8>
llvm.return %metadata : vector<8xi32>
}
@@ -164,7 +164,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<256xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <16 x i32>, <128 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<256xi8> -> vector<16xi32>, vector<128xi8>
llvm.return %metadata : vector<16xi32>
}
@@ -177,7 +177,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<512xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <32 x i32>, <256 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <32 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<512xi8> -> vector<32xi32>, vector<256xi8>
llvm.return %metadata : vector<32xi32>
}
@@ -190,7 +190,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_1(%spdesc: i32, %data: vector<4xi16
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <2 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<4xi16> -> i32, vector<2xi16>
llvm.return %metadata : i32
}
@@ -203,7 +203,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_2(%spdesc: i32, %data: vector<8xi16
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<8xi16> -> i32, vector<4xi16>
llvm.return %metadata : i32
}
@@ -216,7 +216,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_4(%spdesc: i32, %data: vector<16xi1
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<16xi16> -> i32, vector<8xi16>
llvm.return %metadata : i32
}
@@ -229,7 +229,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_8(%spdesc: i32, %data: vector<32xi1
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <16 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<32xi16> -> i32, vector<16xi16>
llvm.return %metadata : i32
}
@@ -242,7 +242,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_16(%spdesc: i32, %data: vector<64xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <32 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<64xi16> -> vector<2xi32>, vector<32xi16>
llvm.return %metadata : vector<2xi32>
}
@@ -255,7 +255,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_32(%spdesc: i32, %data: vector<128x
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <64 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<128xi16> -> vector<4xi32>, vector<64xi16>
llvm.return %metadata : vector<4xi32>
}
@@ -268,7 +268,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b2_rpf_64(%spdesc: i32, %data: vector<256x
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <128 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<256xi16> -> vector<8xi32>, vector<128xi16>
llvm.return %metadata : vector<8xi32>
}
@@ -281,7 +281,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_1(%spdesc: i32, %data: vector<4xi16
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <2 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<4xi16> -> i32, vector<2xi16>
llvm.return %metadata : i32
}
@@ -294,7 +294,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_2(%spdesc: i32, %data: vector<8xi16
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<8xi16> -> i32, vector<4xi16>
llvm.return %metadata : i32
}
@@ -307,7 +307,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_4(%spdesc: i32, %data: vector<16xi1
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <8 x i16> } %[[RES]], 1
// CHECK-NEXT: ret i32 %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<16xi16> -> i32, vector<8xi16>
llvm.return %metadata : i32
}
@@ -320,7 +320,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_8(%spdesc: i32, %data: vector<32xi1
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <2 x i32>, <16 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <2 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<32xi16> -> vector<2xi32>, vector<16xi16>
llvm.return %metadata : vector<2xi32>
}
@@ -333,7 +333,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_16(%spdesc: i32, %data: vector<64xi
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <4 x i32>, <32 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <4 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<64xi16> -> vector<4xi32>, vector<32xi16>
llvm.return %metadata : vector<4xi32>
}
@@ -346,7 +346,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_32(%spdesc: i32, %data: vector<128x
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <8 x i32>, <64 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <8 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<128xi16> -> vector<8xi32>, vector<64xi16>
llvm.return %metadata : vector<8xi32>
}
@@ -359,7 +359,7 @@ llvm.func @spcompress_elmsz_b16_idxsz_b4_rpf_64(%spdesc: i32, %data: vector<256x
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { <16 x i32>, <128 x i16> } %[[RES]], 1
// CHECK-NEXT: ret <16 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 4
: i32, vector<256xi16> -> vector<16xi32>, vector<128xi16>
llvm.return %metadata : vector<16xi32>
}
@@ -373,7 +373,7 @@ llvm.func @spcompress_elmsz_b8_idxsz_b2_rpf_1_vec1(%spdesc: i32, %data: vector<8
// CHECK-NEXT: %{{[0-9]+}} = extractvalue { i32, <4 x i8> } %[[RES]], 1
// CHECK-NEXT: ret <1 x i32> %[[MDATA]]
// CHECK-NEXT: }
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
+ %metadata, %compressed_data = nvvm.sparse.compress %spdesc, %data idx_size = 2
: i32, vector<8xi8> -> vector<1xi32>, vector<4xi8>
llvm.return %metadata : vector<1xi32>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-invalid.mlir
new file mode 100644
index 00000000000000..d7b888d8dcddd6
--- /dev/null
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-invalid.mlir
@@ -0,0 +1,135 @@
+// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
+
+llvm.func @spdecompress_elem_type_mismatch(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects data and compressed data to have the same element type}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi16>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_data_not_multiple_of_num_tgt(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects data to have repFactor * num_tgt elements, where repFactor is a power of two up to 64}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<6xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_rep_factor_not_power_of_2(%metadata: i32, %compdata: vector<6xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects data to have repFactor * num_tgt elements, where repFactor is a power of two up to 64}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<6xi8> -> vector<12xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_unsupported_num_src(%metadata: i32, %compdata: vector<3xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op unsupported sparsity factor: compressed data has 3 elements for 1 group(s) of 4 elements}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<3xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_num_src_equals_num_tgt(%metadata: i32, %compdata: vector<4xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op unsupported sparsity factor: compressed data has 4 elements for 1 group(s) of 4 elements}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<4xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: vector<1xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects data to be between 32 and 4096 bits}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ : i32, vector<1xi8> -> vector<2xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_data_too_large(%metadata: vector<4xi32>, %compdata: vector<32xi16>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects data to be between 32 and 4096 bits}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ : vector<4xi32>, vector<32xi16> -> vector<512xi16>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_compressed_group_too_large(%metadata: i32, %compdata: vector<4xi16>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects at most 32 bits of compressed data per group}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ : i32, vector<4xi16> -> vector<8xi16>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_idx_size_for_num_tgt(%metadata: i32, %compdata: vector<1xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects num_tgt to be at most 4 if idx_size is 2}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 8
+ : i32, vector<1xi8> -> vector<8xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdata: vector<4xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op expects metadata to occupy 1 32-bit register(s)}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ : vector<2xi32>, vector<4xi8> -> vector<8xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_idx_size(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op attribute 'idxSize' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4}}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 8 num_tgt = 4
+ : i32, vector<2xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_invalid_num_tgt(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op attribute 'numTgt' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4, 8, 16}}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 3
+ : i32, vector<2xi8> -> vector<6xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vector<[2]xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[2]xi8>'}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<[2]xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: vector<2xi8>) {
+ %metadata = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
+ // expected-error @below {{'nvvm.sparse.decompress' op operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32 of ranks 1, but got 'vector<1x2xi32>'}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : vector<1x2xi32>, vector<2xi8> -> vector<4xi8>
+ llvm.return
+}
+
+// -----
+
+llvm.func @spdecompress_scalable_data(%metadata: i32, %compdata: vector<2xi8>) {
+ // expected-error @below {{'nvvm.sparse.decompress' op result #0 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[4]xi8>'}}
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ : i32, vector<2xi8> -> vector<[4]xi8>
+ llvm.return
+}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to16.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to16.mlir
index cc355fb1069163..0198417281a0f9 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to16.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<1xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<2xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<4xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<8xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<2xi32>, vector<16xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<4xi32>, vector<32xi8> -> vector<512xi8>
llvm.return %res : vector<512xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<1xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<2xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<4xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<8xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp1to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi3
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<2xi32>, vector<16xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to2.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to2.mlir
index 2b07f5476fe7cb..204c1e2577f55c 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to2.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to2.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<2xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<4xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<8xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<16xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: vector<2xi32>, vector<32xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: vector<4xi32>, vector<64xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<2xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<4xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<8xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: vector<2xi32>, vector<16xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: vector<4xi32>, vector<32xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -127,7 +127,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: vector<8xi32>, vector<64xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <2 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<1xi16> -> vector<2xi16>
llvm.return %res : vector<2xi16>
}
@@ -149,7 +149,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<2xi16> -> vector<4xi16>
llvm.return %res : vector<4xi16>
}
@@ -160,7 +160,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<4xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -171,7 +171,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<8xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -182,7 +182,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: i32, vector<16xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -193,7 +193,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: vector<2xi32>, vector<32xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -204,7 +204,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: vector<4xi32>, vector<64xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -215,7 +215,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <2 x i16> @llvm.nvvm.spdecompress.v2i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <2 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<1xi16> -> vector<2xi16>
llvm.return %res : vector<2xi16>
}
@@ -226,7 +226,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<2xi16> -> vector<4xi16>
llvm.return %res : vector<4xi16>
}
@@ -237,7 +237,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<4xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -248,7 +248,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: i32, vector<8xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -259,7 +259,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: vector<2xi32>, vector<16xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -270,7 +270,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: vector<4xi32>, vector<32xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -281,7 +281,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 2
: vector<8xi32>, vector<64xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -293,7 +293,7 @@ llvm.func @spdecompress_sp1to2_elmsz_b8_idxsz_b2_rpf_2_vec1(%metadata: vector<1x
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %[[MDATA]], <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 2)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 2
: vector<1xi32>, vector<2xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to4.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to4.mlir
index a65459219aa2ae..fe3eb73f71b65b 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to4.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<1xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<2xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<4xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<8xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v16i8(i32 %0, <16 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<16xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<2xi32>, vector<32xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<4xi32>, vector<64xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<1xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<2xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<4xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<8xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -127,7 +127,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<2xi32>, vector<16xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<4xi32>, vector<32xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -149,7 +149,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<8xi32>, vector<64xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -160,7 +160,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<1xi16> -> vector<4xi16>
llvm.return %res : vector<4xi16>
}
@@ -171,7 +171,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<2xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -182,7 +182,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<4xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -193,7 +193,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<8xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -204,7 +204,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v16i16(i32 %0, <16 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<16xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -215,7 +215,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<2xi32>, vector<32xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -226,7 +226,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<4xi32>, vector<64xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
@@ -237,7 +237,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<1xi16> -> vector<4xi16>
llvm.return %res : vector<4xi16>
}
@@ -248,7 +248,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<2xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -259,7 +259,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<4xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -270,7 +270,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<8xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -281,7 +281,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<2xi32>, vector<16xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -292,7 +292,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<4xi32>, vector<32xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -303,7 +303,7 @@ llvm.func @spdecompress_sp1to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<8xi32>, vector<64xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to8.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to8.mlir
index b2761590bd2579..3c87d467d616e8 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp1to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp1to8.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v1i8(i32 %0, <1 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<1xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<2xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<4xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<8xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<2xi32>, vector<16xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<4xi32>, vector<32xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<8xi32>, vector<64xi8> -> vector<512xi8>
llvm.return %res : vector<512xi8>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v1i16(i32 %0, <1 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<1xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<2xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<4xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<8xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -127,7 +127,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<2xi32>, vector<16xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp1to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<4xi32>, vector<32xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to16.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to16.mlir
index b249cebbcec398..e30156b98fa509 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to16.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<2xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<4xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<8xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<2xi32>, vector<16xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<4xi32>, vector<32xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<8xi32>, vector<64xi8> -> vector<512xi8>
llvm.return %res : vector<512xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<2xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<4xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compda
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<8xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<2xi32>, vector<16xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp2to16_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi3
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<4xi32>, vector<32xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to4.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to4.mlir
index d5ceb0935e95c0..366b7429c4dcaa 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to4.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to4.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<2xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<4xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<8xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_8(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v16i8(i32 %0, <16 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<16xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_16(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v32i8(<2 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<2xi32>, vector<32xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_32(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v64i8(<4 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<4xi32>, vector<64xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b2_rpf_64(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v128i8(<8 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<8xi32>, vector<128xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i8> @llvm.nvvm.spdecompress.v4i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<2xi8> -> vector<4xi8>
llvm.return %res : vector<4xi8>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<4xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<8xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>,
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<2xi32>, vector<16xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -127,7 +127,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<4xi32>, vector<32xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<8xi32>, vector<64xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -149,7 +149,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<16xi32>, vector<128xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -160,7 +160,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<2xi16> -> vector<4xi16>
llvm.return %res : vector<4xi16>
}
@@ -171,7 +171,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<4xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -182,7 +182,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<8xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -193,7 +193,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_8(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v16i16(i32 %0, <16 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: i32, vector<16xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -204,7 +204,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_16(%metadata: vector<2xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v32i16(<2 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<2xi32>, vector<32xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -215,7 +215,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_32(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v64i16(<4 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<4xi32>, vector<64xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -226,7 +226,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b2_rpf_64(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v128i16(<8 x i32> %0, <128 x i16> %1, /* idx_size= */ i32 2, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 2 num_tgt = 4
: vector<8xi32>, vector<128xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
@@ -237,7 +237,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <4 x i16> @llvm.nvvm.spdecompress.v4i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <4 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<2xi16> -> vector<4xi16>
llvm.return %res : vector<4xi16>
}
@@ -248,7 +248,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<4xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -259,7 +259,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: i32, vector<8xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -270,7 +270,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<2xi32>, vector<16xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -281,7 +281,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<4xi32>, vector<32xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -292,7 +292,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<8xi32>, vector<64xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -303,7 +303,7 @@ llvm.func @spdecompress_sp2to4_elmsz_b16_idxsz_b4_rpf_64(%metadata: vector<16xi3
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v16i32.v128i16(<16 x i32> %0, <128 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 4)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 4
: vector<16xi32>, vector<128xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to8.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to8.mlir
index 4015848ccb030a..6ba4d833ff40c1 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp2to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp2to8.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v2i8(i32 %0, <2 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<2xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<4xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<8xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<2xi32>,
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<2xi32>, vector<16xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<4xi32>, vector<32xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<8xi32>, vector<64xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<16xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<16xi32>, vector<128xi8> -> vector<512xi8>
llvm.return %res : vector<512xi8>
}
@@ -83,7 +83,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i16> @llvm.nvvm.spdecompress.v8i16.i32.v2i16(i32 %0, <2 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <8 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<2xi16> -> vector<8xi16>
llvm.return %res : vector<8xi16>
}
@@ -94,7 +94,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i16> @llvm.nvvm.spdecompress.v16i16.i32.v4i16(i32 %0, <4 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <16 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<4xi16> -> vector<16xi16>
llvm.return %res : vector<16xi16>
}
@@ -105,7 +105,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_4(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i16> @llvm.nvvm.spdecompress.v32i16.i32.v8i16(i32 %0, <8 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <32 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<8xi16> -> vector<32xi16>
llvm.return %res : vector<32xi16>
}
@@ -116,7 +116,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_8(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i16> @llvm.nvvm.spdecompress.v64i16.v2i32.v16i16(<2 x i32> %0, <16 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <64 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<2xi32>, vector<16xi16> -> vector<64xi16>
llvm.return %res : vector<64xi16>
}
@@ -127,7 +127,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_16(%metadata: vector<4xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i16> @llvm.nvvm.spdecompress.v128i16.v4i32.v32i16(<4 x i32> %0, <32 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <128 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<4xi32>, vector<32xi16> -> vector<128xi16>
llvm.return %res : vector<128xi16>
}
@@ -138,7 +138,7 @@ llvm.func @spdecompress_sp2to8_elmsz_b16_idxsz_b4_rpf_32(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i16> @llvm.nvvm.spdecompress.v256i16.v8i32.v64i16(<8 x i32> %0, <64 x i16> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <256 x i16> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<8xi32>, vector<64xi16> -> vector<256xi16>
llvm.return %res : vector<256xi16>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp4to16.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp4to16.mlir
index a3dad050d5a64b..b271d55721e7b8 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to16.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp4to16.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<4xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdat
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: i32, vector<8xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<2xi32>, vector<16xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<4xi32>, vector<32xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<8xi32>, vector<64xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp4to16_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi3
// CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 16)
// CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 16
: vector<16xi32>, vector<128xi8> -> vector<512xi8>
llvm.return %res : vector<512xi8>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp4to8.mlir
similarity index 88%
rename from mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
rename to mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp4to8.mlir
index 8cda8328b3e99e..03a2dabc3485a8 100644
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-sp4to8.mlir
+++ b/mlir/test/Target/LLVMIR/nvvm/sparse-decompress-sp4to8.mlir
@@ -6,7 +6,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_1(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <8 x i8> @llvm.nvvm.spdecompress.v8i8.i32.v4i8(i32 %0, <4 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <8 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<4xi8> -> vector<8xi8>
llvm.return %res : vector<8xi8>
}
@@ -17,7 +17,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_2(%metadata: i32, %compdata
// CHECK-NEXT: %[[RES:[0-9]+]] = call <16 x i8> @llvm.nvvm.spdecompress.v16i8.i32.v8i8(i32 %0, <8 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <16 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: i32, vector<8xi8> -> vector<16xi8>
llvm.return %res : vector<16xi8>
}
@@ -28,7 +28,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_4(%metadata: vector<2xi32>,
// CHECK-NEXT: %[[RES:[0-9]+]] = call <32 x i8> @llvm.nvvm.spdecompress.v32i8.v2i32.v16i8(<2 x i32> %0, <16 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <32 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<2xi32>, vector<16xi8> -> vector<32xi8>
llvm.return %res : vector<32xi8>
}
@@ -39,7 +39,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_8(%metadata: vector<4xi32>,
// CHECK-NEXT: %[[RES:[0-9]+]] = call <64 x i8> @llvm.nvvm.spdecompress.v64i8.v4i32.v32i8(<4 x i32> %0, <32 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <64 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<4xi32>, vector<32xi8> -> vector<64xi8>
llvm.return %res : vector<64xi8>
}
@@ -50,7 +50,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_16(%metadata: vector<8xi32>
// CHECK-NEXT: %[[RES:[0-9]+]] = call <128 x i8> @llvm.nvvm.spdecompress.v128i8.v8i32.v64i8(<8 x i32> %0, <64 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <128 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<8xi32>, vector<64xi8> -> vector<128xi8>
llvm.return %res : vector<128xi8>
}
@@ -61,7 +61,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_32(%metadata: vector<16xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <256 x i8> @llvm.nvvm.spdecompress.v256i8.v16i32.v128i8(<16 x i32> %0, <128 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <256 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<16xi32>, vector<128xi8> -> vector<256xi8>
llvm.return %res : vector<256xi8>
}
@@ -72,7 +72,7 @@ llvm.func @spdecompress_sp4to8_elmsz_b8_idxsz_b4_rpf_64(%metadata: vector<32xi32
// CHECK-NEXT: %[[RES:[0-9]+]] = call <512 x i8> @llvm.nvvm.spdecompress.v512i8.v32i32.v256i8(<32 x i32> %0, <256 x i8> %1, /* idx_size= */ i32 4, /* num_tgt= */ i32 8)
// CHECK-NEXT: ret <512 x i8> %[[RES]]
// CHECK-NEXT: }
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
+ %res = nvvm.sparse.decompress %metadata, %compdata idx_size = 4 num_tgt = 8
: vector<32xi32>, vector<256xi8> -> vector<512xi8>
llvm.return %res : vector<512xi8>
}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
deleted file mode 100644
index a6bb0d683dc1f6..00000000000000
--- a/mlir/test/Target/LLVMIR/nvvm/spcompress-invalid.mlir
+++ /dev/null
@@ -1,99 +0,0 @@
-// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
-
-llvm.func @spcompress_elem_type_mismatch(%spdesc: i32, %data: vector<8xi8>) {
- // expected-error @below {{'nvvm.spcompress' op expects data and compressed data to have the same element type}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<8xi8> -> i32, vector<4xi16>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_data_too_small(%spdesc: i32, %data: vector<4xi8>) {
- // expected-error @below {{'nvvm.spcompress' op expects data to occupy 2 * repFactor 32-bit registers, where repFactor is a power of two up to 64}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<4xi8> -> i32, vector<2xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_rep_factor_not_power_of_2(%spdesc: i32, %data: vector<24xi8>) {
- // expected-error @below {{'nvvm.spcompress' op expects data to occupy 2 * repFactor 32-bit registers, where repFactor is a power of two up to 64}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<24xi8> -> i32, vector<12xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_invalid_compressed_data_size(%spdesc: i32, %data: vector<8xi8>) {
- // expected-error @below {{'nvvm.spcompress' op expects compressed data to have half as many elements as data}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<8xi8> -> i32, vector<8xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_invalid_metadata_size(%spdesc: i32, %data: vector<16xi8>) {
- // expected-error @below {{'nvvm.spcompress' op expects metadata to occupy 1 32-bit register(s)}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 4
- : i32, vector<16xi8> -> vector<2xi32>, vector<8xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_invalid_idx_size(%spdesc: i32, %data: vector<8xi8>) {
- // expected-error @below {{'nvvm.spcompress' op attribute 'idxSize' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4}}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 3
- : i32, vector<8xi8> -> i32, vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_invalid_elem_type(%spdesc: i32, %data: vector<2xi32>) {
- // expected-error @below {{'nvvm.spcompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<2xi32>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<2xi32> -> i32, vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_scalable_data(%spdesc: i32, %data: vector<[8]xi8>) {
- // expected-error @below {{'nvvm.spcompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[8]xi8>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<[8]xi8> -> i32, vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_rank2_data(%spdesc: i32, %arg: vector<8xi8>) {
- %data = builtin.unrealized_conversion_cast %arg : vector<8xi8> to vector<1x8xi8>
- // expected-error @below {{'nvvm.spcompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<1x8xi8>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<1x8xi8> -> i32, vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_scalable_compressed_data(%spdesc: i32, %data: vector<8xi8>) {
- // expected-error @below {{'nvvm.spcompress' op result #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[4]xi8>'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<8xi8> -> i32, vector<[4]xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spcompress_invalid_metadata_type(%spdesc: i32, %data: vector<8xi8>) {
- // expected-error @below {{'nvvm.spcompress' op result #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32 of ranks 1, but got 'i64'}}
- %metadata, %compressed_data = nvvm.spcompress %spdesc, %data idx_size = 2
- : i32, vector<8xi8> -> i64, vector<4xi8>
- llvm.return
-}
diff --git a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir b/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
deleted file mode 100644
index 67229f1d4063a1..00000000000000
--- a/mlir/test/Target/LLVMIR/nvvm/spdecompress-invalid.mlir
+++ /dev/null
@@ -1,135 +0,0 @@
-// RUN: mlir-translate --mlir-to-llvmir -verify-diagnostics -split-input-file %s
-
-llvm.func @spdecompress_elem_type_mismatch(%metadata: i32, %compdata: vector<2xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op expects data and compressed data to have the same element type}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<2xi8> -> vector<4xi16>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_data_not_multiple_of_num_tgt(%metadata: i32, %compdata: vector<2xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op expects data to have repFactor * num_tgt elements, where repFactor is a power of two up to 64}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<2xi8> -> vector<6xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_rep_factor_not_power_of_2(%metadata: i32, %compdata: vector<6xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op expects data to have repFactor * num_tgt elements, where repFactor is a power of two up to 64}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<6xi8> -> vector<12xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_unsupported_num_src(%metadata: i32, %compdata: vector<3xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op unsupported sparsity factor: compressed data has 3 elements for 1 group(s) of 4 elements}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<3xi8> -> vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_num_src_equals_num_tgt(%metadata: i32, %compdata: vector<4xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op unsupported sparsity factor: compressed data has 4 elements for 1 group(s) of 4 elements}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<4xi8> -> vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_data_too_small(%metadata: i32, %compdata: vector<1xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op expects data to be between 32 and 4096 bits}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 2
- : i32, vector<1xi8> -> vector<2xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_data_too_large(%metadata: vector<4xi32>, %compdata: vector<32xi16>) {
- // expected-error @below {{'nvvm.spdecompress' op expects data to be between 32 and 4096 bits}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 16
- : vector<4xi32>, vector<32xi16> -> vector<512xi16>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_compressed_group_too_large(%metadata: i32, %compdata: vector<4xi16>) {
- // expected-error @below {{'nvvm.spdecompress' op expects at most 32 bits of compressed data per group}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 8
- : i32, vector<4xi16> -> vector<8xi16>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_invalid_idx_size_for_num_tgt(%metadata: i32, %compdata: vector<1xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op expects num_tgt to be at most 4 if idx_size is 2}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 8
- : i32, vector<1xi8> -> vector<8xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_invalid_metadata_size(%metadata: vector<2xi32>, %compdata: vector<4xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op expects metadata to occupy 1 32-bit register(s)}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 4 num_tgt = 4
- : vector<2xi32>, vector<4xi8> -> vector<8xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_invalid_idx_size(%metadata: i32, %compdata: vector<2xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op attribute 'idxSize' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4}}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 8 num_tgt = 4
- : i32, vector<2xi8> -> vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_invalid_num_tgt(%metadata: i32, %compdata: vector<2xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op attribute 'numTgt' failed to satisfy constraint: 32-bit signless integer attribute whose value is one of {2, 4, 8, 16}}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 3
- : i32, vector<2xi8> -> vector<6xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_scalable_compressed_data(%metadata: i32, %compdata: vector<[2]xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op operand #1 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[2]xi8>'}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<[2]xi8> -> vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_rank2_metadata(%arg: vector<2xi32>, %compdata: vector<2xi8>) {
- %metadata = builtin.unrealized_conversion_cast %arg : vector<2xi32> to vector<1x2xi32>
- // expected-error @below {{'nvvm.spdecompress' op operand #0 must be 32-bit signless integer or fixed-length vector of 32-bit signless integer values of length 1/2/4/8/16/32 of ranks 1, but got 'vector<1x2xi32>'}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : vector<1x2xi32>, vector<2xi8> -> vector<4xi8>
- llvm.return
-}
-
-// -----
-
-llvm.func @spdecompress_scalable_data(%metadata: i32, %compdata: vector<2xi8>) {
- // expected-error @below {{'nvvm.spdecompress' op result #0 must be fixed-length vector of 8-bit signless integer or 16-bit signless integer values of ranks 1, but got 'vector<[4]xi8>'}}
- %res = nvvm.spdecompress %metadata, %compdata idx_size = 2 num_tgt = 4
- : i32, vector<2xi8> -> vector<[4]xi8>
- llvm.return
-}
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