[Mlir-commits] [llvm] [mlir] [LLVM][docs] Rename AMDGPU reST docs to Markdown (PR #233644)
Reid Kleckner
llvmlistbot at llvm.org
Wed Oct 21 15:04:39 PDT 2026
https://github.com/rnk updated https://github.com/llvm/llvm-project/pull/233644
>From 38b7f986e5f91c6a8022a72ed19efdc8a7e931f8 Mon Sep 17 00:00:00 2001
From: Reid Kleckner <rkleckner at nvidia.com>
Date: Mon, 19 Oct 2026 23:40:30 +0000
Subject: [PATCH 1/2] [LLVM][docs] Rename AMDGPU reST docs to Markdown
Rename the AMDGPU reST docs that are still in reST to .md without changing
their contents, and update the one link that names a renamed file. The reST
to MyST conversion follows in separate changes.
LLM-aided
---
.../AMDGPU/{DeveloperGuideline.rst => DeveloperGuideline.md} | 0
...xtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md | 2 +-
...ng.rst => AMDGPUDwarfExtensionsForHeterogeneousDebugging.md} | 0
...DGPUInstructionNotation.rst => AMDGPUInstructionNotation.md} | 0
.../{AMDGPUInstructionSyntax.rst => AMDGPUInstructionSyntax.md} | 0
llvm/docs/{AMDGPUModifierSyntax.rst => AMDGPUModifierSyntax.md} | 0
llvm/docs/{AMDGPUOperandSyntax.rst => AMDGPUOperandSyntax.md} | 0
llvm/docs/{AMDGPUUsage.rst => AMDGPUUsage.md} | 0
8 files changed, 1 insertion(+), 1 deletion(-)
rename llvm/docs/AMDGPU/{DeveloperGuideline.rst => DeveloperGuideline.md} (100%)
rename llvm/docs/{AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst => AMDGPUDwarfExtensionsForHeterogeneousDebugging.md} (100%)
rename llvm/docs/{AMDGPUInstructionNotation.rst => AMDGPUInstructionNotation.md} (100%)
rename llvm/docs/{AMDGPUInstructionSyntax.rst => AMDGPUInstructionSyntax.md} (100%)
rename llvm/docs/{AMDGPUModifierSyntax.rst => AMDGPUModifierSyntax.md} (100%)
rename llvm/docs/{AMDGPUOperandSyntax.rst => AMDGPUOperandSyntax.md} (100%)
rename llvm/docs/{AMDGPUUsage.rst => AMDGPUUsage.md} (100%)
diff --git a/llvm/docs/AMDGPU/DeveloperGuideline.rst b/llvm/docs/AMDGPU/DeveloperGuideline.md
similarity index 100%
rename from llvm/docs/AMDGPU/DeveloperGuideline.rst
rename to llvm/docs/AMDGPU/DeveloperGuideline.md
diff --git a/llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md b/llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
index 15d1c2e8a0ec58..5795233474ba39 100644
--- a/llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
+++ b/llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
@@ -4016,4 +4016,4 @@ examples. It also covers other extensions needed for heterogeneous devices.
- DWARF extensions for optimized SIMT/SIMD (GPU) debugging - Linux Plumbers Conference 2021
- [Video](https://www.youtube.com/watch?v=QiR0ra0ymEY&t=10015s)
- [Slides](https://linuxplumbersconf.org/event/11/contributions/1012/attachments/798/1505/DWARF_Extensions_for_Optimized_SIMT-SIMD_GPU_Debugging-LPC2021.pdf)
-- [DWARF Extensions For Heterogeneous Debugging](../AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst)
+- [DWARF Extensions For Heterogeneous Debugging](../AMDGPUDwarfExtensionsForHeterogeneousDebugging.md)
diff --git a/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst b/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.md
similarity index 100%
rename from llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
rename to llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.md
diff --git a/llvm/docs/AMDGPUInstructionNotation.rst b/llvm/docs/AMDGPUInstructionNotation.md
similarity index 100%
rename from llvm/docs/AMDGPUInstructionNotation.rst
rename to llvm/docs/AMDGPUInstructionNotation.md
diff --git a/llvm/docs/AMDGPUInstructionSyntax.rst b/llvm/docs/AMDGPUInstructionSyntax.md
similarity index 100%
rename from llvm/docs/AMDGPUInstructionSyntax.rst
rename to llvm/docs/AMDGPUInstructionSyntax.md
diff --git a/llvm/docs/AMDGPUModifierSyntax.rst b/llvm/docs/AMDGPUModifierSyntax.md
similarity index 100%
rename from llvm/docs/AMDGPUModifierSyntax.rst
rename to llvm/docs/AMDGPUModifierSyntax.md
diff --git a/llvm/docs/AMDGPUOperandSyntax.rst b/llvm/docs/AMDGPUOperandSyntax.md
similarity index 100%
rename from llvm/docs/AMDGPUOperandSyntax.rst
rename to llvm/docs/AMDGPUOperandSyntax.md
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.md
similarity index 100%
rename from llvm/docs/AMDGPUUsage.rst
rename to llvm/docs/AMDGPUUsage.md
>From c48b99125fbf6babfa15a76753c163af370543c5 Mon Sep 17 00:00:00 2001
From: Reid Kleckner <rkleckner at nvidia.com>
Date: Wed, 21 Oct 2026 22:00:05 +0000
Subject: [PATCH 2/2] [LLVM][docs] Update references to renamed AMDGPU docs
Source comments still pointed at AMDGPUUsage.rst and AMDGPUAsyncOperations.rst.
LLM-aided
---
llvm/include/llvm/Support/AMDGPUAddrSpace.h | 2 +-
mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td | 2 +-
mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/include/llvm/Support/AMDGPUAddrSpace.h b/llvm/include/llvm/Support/AMDGPUAddrSpace.h
index 59537bba5a86fa..42a39d5d66a8b8 100644
--- a/llvm/include/llvm/Support/AMDGPUAddrSpace.h
+++ b/llvm/include/llvm/Support/AMDGPUAddrSpace.h
@@ -180,7 +180,7 @@ static constexpr unsigned LLVMToDWARFAddrSpaceMapping[] = {
///
/// This maps private/scratch to the focused lane view.
///
-/// These mappings must be kept in sync with llvm/docs/AMDGPUUsage.rst
+/// These mappings must be kept in sync with llvm/docs/AMDGPUUsage.md
/// table "AMDGPU DWARF Address Space Mapping".
///
/// Note: This could return std::optional<int> but that would require
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td b/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
index 5b8eb601f72049..f16cd824fa40ed 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
@@ -90,7 +90,7 @@ def ROCDL_Dialect : Dialect {
behavior of these operations can be determined by investigating the
documentation for the corresponding intrinsic. This documentation
can be found in
- - `llvm/docs/AMDGPUUsage.rst` and
+ - `llvm/docs/AMDGPUUsage.md` and
- The comments of `llvm/include/llvm/IR/IntrinsicsAMDGPU.td`, which
is where details of the meaning of certain bitfields or of how an
intrinsic corresponds to hardware instructions are most likely to
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index 716fd92e810ace..87045c1cf54918 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -685,7 +685,7 @@ def ROCDL_AsyncmarkOp : ROCDL_ConcreteNonMemIntrOp<"asyncmark", [], 0>,
and gfx1250's tensor loads.
Details of its behavior can be found in
- [the LLVM documentation on async tracking](/llvm/docs/AMDGPUAsyncOperations.rst).
+ [the LLVM documentation on async tracking](/llvm/docs/AMDGPUAsyncOperations.md).
See `rocdl.wait.asyncmark`'s documentation for a usage example.
@@ -713,7 +713,7 @@ def ROCDL_WaitAsyncmarkOp: ROCDL_ConcreteNonMemIntrOp<"wait.asyncmark", [], 0, [
other than the `count` previously-added ones will have finished executing.
For more detail, including on how this mechanism composes with function calls,
- see [the LLVM documentation on async tracking](/llvm/docs/AMDGPUAsyncOperations.rst).
+ see [the LLVM documentation on async tracking](/llvm/docs/AMDGPUAsyncOperations.md).
Available on gfx9 and later.
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