[Mlir-commits] [llvm] [mlir] [OpenMP][flang] Fix location of reducing worksharing constructs. (PR #233934)

[Abid Qadeer]

abidh wrote:

> Not sure if this applies to this fix but when pulling this change down and running it on an AMD EPYC 7742:
> 
> ```llvm
> define internal void @second_user_..omp_par(ptr noalias %tid.addr, ptr noalias %zero.addr, ptr noalias nofreeobj %0) #1 !dbg !47 {
> ...
> reduce.switch.nonatomic:                          ; preds = %omp.region.cont3
>   %red.value.0 = load i32, ptr %loadgep_, align 4, !dbg !48
>   %red.private.value.0 = load i32, ptr %2, align 4, !dbg !48
>   %7 = add i32 %red.value.0, %red.private.value.0, !dbg !53
>   store i32 %7, ptr %loadgep_, align 4, !dbg !48
>   call void @__kmpc_end_reduce(ptr @5, i32 %omp_global_thread_num6, ptr @.gomp_critical_user_.reduction.var), !dbg !48
>   br label %reduce.finalize, !dbg !48
> ...
> !53 = !DILocation(line: 4, column: 9, scope: !47)
> ```
> 
> !53 points to line 4 and is in `second_user`

Thanks for trying it out. That `add` is a separate issue. It is the body of the reduction combiner from `omp.declare_reduction @add_reduction_i32`. Flang creates one such declaration per module and gives it the location of the first construct that uses it, which is line 4 in `first_user`. The combiner is then copied into `second_user_..omp_par` and keeps that location.

So this is not a translation-level problem; the op already has line 4 in the MLIR that goes into translation:

```
  } combiner {
  ^bb0(%arg0: i32 loc("test.f90":4:9), %arg1: i32 loc("test.f90":4:9)):
    %0 = llvm.add %arg0, %arg1 : i32 loc(#loc3)    // #loc3 = loc("test.f90":4:9)
```

Current main gives this `add` the same line 4. With this PR, it is the only instruction left in `second_user_..omp_par` that reports line 4. I will fix the combiner location in a follow-up.

https://github.com/llvm/llvm-project/pull/233934