[Mlir-commits] [mlir] [mlir][SPIR-V] Add OpenCL ctz, ilogb, and sincos operations (PR #231713)

[Alexander Shaposhnikov]

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@@ -268,3 +272,43 @@ func.func @sincos_vector(%arg0: vector<3xf32>) {
 }
 
 } // end module
+
+// -----
+
+// Emulating narrow types must preserve cttz(0) == source bit width.
+module attributes { spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Kernel], []>, #spirv.resource_limits<>> } {
+  // CHECK-LABEL: @cttz_emulated_i8
+  func.func @cttz_emulated_i8(%arg0: i8) -> i8 {
+    // CHECK: [[INPUT:%.*]] = builtin.unrealized_conversion_cast %arg0 : i8 to i32
+    // CHECK: [[SENTINEL:%.*]] = spirv.Constant 256 : i32
+    // CHECK: [[BOUNDED:%.*]] = spirv.BitwiseOr [[INPUT]], [[SENTINEL]] : i32
+    // CHECK: spirv.CL.ctz [[BOUNDED]] : i32
+    %0 = math.cttz %arg0 : i8
+    return %0 : i8
+  }
+  // CHECK-LABEL: @cttz_emulated_vector
+  func.func @cttz_emulated_vector(%arg0: vector<2xi16>) -> vector<2xi16> {
+    // CHECK: [[INPUT:%.*]] = builtin.unrealized_conversion_cast %arg0 : vector<2xi16> to vector<2xi32>
+    // CHECK: [[SENTINEL:%.*]] = spirv.Constant dense<65536> : vector<2xi32>
+    // CHECK: [[BOUNDED:%.*]] = spirv.BitwiseOr [[INPUT]], [[SENTINEL]] : vector<2xi32>
+    // CHECK: spirv.CL.ctz [[BOUNDED]] : vector<2xi32>
+    %0 = math.cttz %arg0 : vector<2xi16>
+    return %0 : vector<2xi16>
+  }
+}
+
+// -----
+
+module attributes { spirv.target_env = #spirv.target_env<#spirv.vce<v1.0, [Kernel, Int8, Int16, Int64], []>, #spirv.resource_limits<>> } {
+  // CHECK-LABEL: @cttz_native_widths
+  func.func @cttz_native_widths(%a: i8, %b: vector<2xi16>, %c: i64) {
+    // CHECK-NOT: spirv.BitwiseOr
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alexander-shaposhnikov wrote:

Removed

https://github.com/llvm/llvm-project/pull/231713