[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Implement AsyncMark Stages (PR #220442)
Ryan Mitchell
llvmlistbot at llvm.org
Tue Oct 13 13:05:35 PDT 2026
================
@@ -675,8 +675,9 @@ def ROCDL_WaitTensorcntOp: ROCDL_ConcreteNonMemIntrOp<"s.wait.tensorcnt", [], 0,
let assemblyFormat = "$count attr-dict";
}
-def ROCDL_AsyncmarkOp : ROCDL_ConcreteNonMemIntrOp<"asyncmark", [], 0>,
- Arguments<(ins)> {
+def ROCDL_AsyncmarkOp : ROCDL_ConcreteNonMemIntrOp<"asyncmark", [], 0, [0], ["stages"]>,
+ Arguments<(ins DefaultValuedAttr<
+ ConfinedAttr<I32Attr, [IntMinValue<0>, IntMaxValue<2047>]>, "0">:$stages)> {
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RyanRio wrote:
Ah sure thanks
https://github.com/llvm/llvm-project/pull/220442
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